380 lines
8.7 KiB
C
380 lines
8.7 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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/* Hisilicon Hibmc SoC drm driver
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*
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* Based on the bochs drm driver.
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*
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* Copyright (c) 2016 Huawei Limited.
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*
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* Author:
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* Rongrong Zou <zourongrong@huawei.com>
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* Rongrong Zou <zourongrong@gmail.com>
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* Jianhua Li <lijianhua@huawei.com>
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <drm/drm_aperture.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fbdev_generic.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_gem_vram_helper.h>
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#include <drm/drm_managed.h>
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#include <drm/drm_module.h>
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#include <drm/drm_vblank.h>
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#include "hibmc_drm_drv.h"
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#include "hibmc_drm_regs.h"
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DEFINE_DRM_GEM_FOPS(hibmc_fops);
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static irqreturn_t hibmc_interrupt(int irq, void *arg)
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{
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struct drm_device *dev = (struct drm_device *)arg;
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struct hibmc_drm_private *priv = to_hibmc_drm_private(dev);
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u32 status;
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status = readl(priv->mmio + HIBMC_RAW_INTERRUPT);
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if (status & HIBMC_RAW_INTERRUPT_VBLANK(1)) {
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writel(HIBMC_RAW_INTERRUPT_VBLANK(1),
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priv->mmio + HIBMC_RAW_INTERRUPT);
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drm_handle_vblank(dev, 0);
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}
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return IRQ_HANDLED;
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}
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static int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
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struct drm_mode_create_dumb *args)
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{
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return drm_gem_vram_fill_create_dumb(file, dev, 0, 128, args);
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}
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static const struct drm_driver hibmc_driver = {
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.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
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.fops = &hibmc_fops,
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.name = "hibmc",
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.date = "20160828",
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.desc = "hibmc drm driver",
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.major = 1,
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.minor = 0,
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.debugfs_init = drm_vram_mm_debugfs_init,
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.dumb_create = hibmc_dumb_create,
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.dumb_map_offset = drm_gem_ttm_dumb_map_offset,
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.gem_prime_mmap = drm_gem_prime_mmap,
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};
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static int __maybe_unused hibmc_pm_suspend(struct device *dev)
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{
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struct drm_device *drm_dev = dev_get_drvdata(dev);
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return drm_mode_config_helper_suspend(drm_dev);
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}
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static int __maybe_unused hibmc_pm_resume(struct device *dev)
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{
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struct drm_device *drm_dev = dev_get_drvdata(dev);
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return drm_mode_config_helper_resume(drm_dev);
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}
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static const struct dev_pm_ops hibmc_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(hibmc_pm_suspend,
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hibmc_pm_resume)
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};
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static const struct drm_mode_config_funcs hibmc_mode_funcs = {
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.mode_valid = drm_vram_helper_mode_valid,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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.fb_create = drm_gem_fb_create,
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};
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static int hibmc_kms_init(struct hibmc_drm_private *priv)
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{
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struct drm_device *dev = &priv->dev;
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int ret;
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ret = drmm_mode_config_init(dev);
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if (ret)
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return ret;
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dev->mode_config.min_width = 0;
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dev->mode_config.min_height = 0;
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dev->mode_config.max_width = 1920;
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dev->mode_config.max_height = 1200;
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dev->mode_config.preferred_depth = 24;
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dev->mode_config.prefer_shadow = 1;
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dev->mode_config.funcs = (void *)&hibmc_mode_funcs;
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ret = hibmc_de_init(priv);
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if (ret) {
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drm_err(dev, "failed to init de: %d\n", ret);
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return ret;
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}
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ret = hibmc_vdac_init(priv);
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if (ret) {
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drm_err(dev, "failed to init vdac: %d\n", ret);
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return ret;
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}
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return 0;
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}
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/*
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* It can operate in one of three modes: 0, 1 or Sleep.
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*/
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void hibmc_set_power_mode(struct hibmc_drm_private *priv, u32 power_mode)
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{
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u32 control_value = 0;
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void __iomem *mmio = priv->mmio;
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u32 input = 1;
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if (power_mode > HIBMC_PW_MODE_CTL_MODE_SLEEP)
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return;
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if (power_mode == HIBMC_PW_MODE_CTL_MODE_SLEEP)
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input = 0;
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control_value = readl(mmio + HIBMC_POWER_MODE_CTRL);
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control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK |
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HIBMC_PW_MODE_CTL_OSC_INPUT_MASK);
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control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode);
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control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input);
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writel(control_value, mmio + HIBMC_POWER_MODE_CTRL);
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}
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void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate)
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{
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u32 gate_reg;
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u32 mode;
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void __iomem *mmio = priv->mmio;
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/* Get current power mode. */
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mode = (readl(mmio + HIBMC_POWER_MODE_CTRL) &
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HIBMC_PW_MODE_CTL_MODE_MASK) >> HIBMC_PW_MODE_CTL_MODE_SHIFT;
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switch (mode) {
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case HIBMC_PW_MODE_CTL_MODE_MODE0:
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gate_reg = HIBMC_MODE0_GATE;
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break;
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case HIBMC_PW_MODE_CTL_MODE_MODE1:
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gate_reg = HIBMC_MODE1_GATE;
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break;
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default:
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gate_reg = HIBMC_MODE0_GATE;
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break;
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}
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writel(gate, mmio + gate_reg);
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}
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static void hibmc_hw_config(struct hibmc_drm_private *priv)
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{
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u32 reg;
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/* On hardware reset, power mode 0 is default. */
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hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0);
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/* Enable display power gate & LOCALMEM power gate*/
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reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
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reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK;
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reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK;
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reg |= HIBMC_CURR_GATE_DISPLAY(1);
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reg |= HIBMC_CURR_GATE_LOCALMEM(1);
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hibmc_set_current_gate(priv, reg);
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/*
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* Reset the memory controller. If the memory controller
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* is not reset in chip,the system might hang when sw accesses
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* the memory.The memory should be resetted after
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* changing the MXCLK.
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*/
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reg = readl(priv->mmio + HIBMC_MISC_CTRL);
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reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
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reg |= HIBMC_MSCCTL_LOCALMEM_RESET(0);
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writel(reg, priv->mmio + HIBMC_MISC_CTRL);
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reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
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reg |= HIBMC_MSCCTL_LOCALMEM_RESET(1);
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writel(reg, priv->mmio + HIBMC_MISC_CTRL);
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}
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static int hibmc_hw_map(struct hibmc_drm_private *priv)
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{
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struct drm_device *dev = &priv->dev;
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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resource_size_t ioaddr, iosize;
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ioaddr = pci_resource_start(pdev, 1);
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iosize = pci_resource_len(pdev, 1);
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priv->mmio = devm_ioremap(dev->dev, ioaddr, iosize);
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if (!priv->mmio) {
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drm_err(dev, "Cannot map mmio region\n");
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return -ENOMEM;
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}
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return 0;
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}
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static int hibmc_hw_init(struct hibmc_drm_private *priv)
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{
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int ret;
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ret = hibmc_hw_map(priv);
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if (ret)
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return ret;
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hibmc_hw_config(priv);
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return 0;
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}
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static int hibmc_unload(struct drm_device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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drm_atomic_helper_shutdown(dev);
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free_irq(pdev->irq, dev);
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pci_disable_msi(to_pci_dev(dev->dev));
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return 0;
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}
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static int hibmc_load(struct drm_device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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struct hibmc_drm_private *priv = to_hibmc_drm_private(dev);
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int ret;
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ret = hibmc_hw_init(priv);
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if (ret)
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goto err;
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ret = drmm_vram_helper_init(dev, pci_resource_start(pdev, 0),
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pci_resource_len(pdev, 0));
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if (ret) {
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drm_err(dev, "Error initializing VRAM MM; %d\n", ret);
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goto err;
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}
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ret = hibmc_kms_init(priv);
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if (ret)
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goto err;
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ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
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if (ret) {
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drm_err(dev, "failed to initialize vblank: %d\n", ret);
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goto err;
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}
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ret = pci_enable_msi(pdev);
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if (ret) {
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drm_warn(dev, "enabling MSI failed: %d\n", ret);
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} else {
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/* PCI devices require shared interrupts. */
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ret = request_irq(pdev->irq, hibmc_interrupt, IRQF_SHARED,
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dev->driver->name, dev);
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if (ret)
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drm_warn(dev, "install irq failed: %d\n", ret);
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}
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/* reset all the states of crtc/plane/encoder/connector */
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drm_mode_config_reset(dev);
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return 0;
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err:
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hibmc_unload(dev);
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drm_err(dev, "failed to initialize drm driver: %d\n", ret);
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return ret;
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}
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static int hibmc_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct hibmc_drm_private *priv;
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struct drm_device *dev;
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int ret;
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ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &hibmc_driver);
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if (ret)
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return ret;
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priv = devm_drm_dev_alloc(&pdev->dev, &hibmc_driver,
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struct hibmc_drm_private, dev);
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if (IS_ERR(priv)) {
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DRM_ERROR("failed to allocate drm_device\n");
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return PTR_ERR(priv);
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}
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dev = &priv->dev;
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pci_set_drvdata(pdev, dev);
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ret = pcim_enable_device(pdev);
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if (ret) {
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drm_err(dev, "failed to enable pci device: %d\n", ret);
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goto err_return;
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}
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ret = hibmc_load(dev);
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if (ret) {
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drm_err(dev, "failed to load hibmc: %d\n", ret);
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goto err_return;
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}
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ret = drm_dev_register(dev, 0);
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if (ret) {
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drm_err(dev, "failed to register drv for userspace access: %d\n",
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ret);
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goto err_unload;
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}
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drm_fbdev_generic_setup(dev, 32);
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return 0;
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err_unload:
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hibmc_unload(dev);
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err_return:
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return ret;
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}
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static void hibmc_pci_remove(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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drm_dev_unregister(dev);
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hibmc_unload(dev);
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}
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static const struct pci_device_id hibmc_pci_table[] = {
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{ PCI_VDEVICE(HUAWEI, 0x1711) },
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{0,}
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};
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static struct pci_driver hibmc_pci_driver = {
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.name = "hibmc-drm",
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.id_table = hibmc_pci_table,
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.probe = hibmc_pci_probe,
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.remove = hibmc_pci_remove,
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.driver.pm = &hibmc_pm_ops,
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};
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||
|
|
|
||
|
|
drm_module_pci_driver(hibmc_pci_driver);
|
||
|
|
|
||
|
|
MODULE_DEVICE_TABLE(pci, hibmc_pci_table);
|
||
|
|
MODULE_AUTHOR("RongrongZou <zourongrong@huawei.com>");
|
||
|
|
MODULE_DESCRIPTION("DRM Driver for Hisilicon Hibmc");
|
||
|
|
MODULE_LICENSE("GPL v2");
|