51 lines
2.0 KiB
C
51 lines
2.0 KiB
C
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// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2023 Intel Corporation
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*/
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#ifndef __INTEL_CX0_PHY_H__
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#define __INTEL_CX0_PHY_H__
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#include <linux/types.h>
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include "i915_drv.h"
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#include "intel_display_types.h"
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struct drm_i915_private;
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struct intel_encoder;
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struct intel_crtc_state;
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enum icl_port_dpll_id;
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enum phy;
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bool intel_is_c10phy(struct drm_i915_private *dev_priv, enum phy phy);
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void intel_mtl_pll_enable(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_mtl_pll_disable(struct intel_encoder *encoder);
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enum icl_port_dpll_id
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intel_mtl_port_pll_type(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_c10pll_readout_hw_state(struct intel_encoder *encoder, struct intel_c10pll_state *pll_state);
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int intel_cx0pll_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder);
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void intel_c10pll_dump_hw_state(struct drm_i915_private *dev_priv,
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const struct intel_c10pll_state *hw_state);
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int intel_c10pll_calc_port_clock(struct intel_encoder *encoder,
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const struct intel_c10pll_state *pll_state);
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void intel_c10pll_state_verify(struct intel_atomic_state *state,
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struct intel_crtc_state *new_crtc_state);
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void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,
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struct intel_c20pll_state *pll_state);
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void intel_c20pll_dump_hw_state(struct drm_i915_private *i915,
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const struct intel_c20pll_state *hw_state);
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int intel_c20pll_calc_port_clock(struct intel_encoder *encoder,
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const struct intel_c20pll_state *pll_state);
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void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock);
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void intel_cx0_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state,
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u32 level);
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int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder);
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#endif /* __INTEL_CX0_PHY_H__ */
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