2023-08-30 17:31:07 +02:00
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __I915_IRQ_H__
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#define __I915_IRQ_H__
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#include <linux/ktime.h>
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#include <linux/types.h>
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2023-10-24 12:59:35 +02:00
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#include "i915_reg_defs.h"
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2023-08-30 17:31:07 +02:00
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enum pipe;
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struct drm_crtc;
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struct drm_device;
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struct drm_display_mode;
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struct drm_i915_private;
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struct intel_crtc;
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2023-10-24 12:59:35 +02:00
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struct intel_encoder;
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2023-08-30 17:31:07 +02:00
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struct intel_uncore;
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void intel_irq_init(struct drm_i915_private *dev_priv);
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void intel_irq_fini(struct drm_i915_private *dev_priv);
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int intel_irq_install(struct drm_i915_private *dev_priv);
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void intel_irq_uninstall(struct drm_i915_private *dev_priv);
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void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, u32 mask);
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void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, u32 mask);
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void gen11_reset_rps_interrupts(struct drm_i915_private *dev_priv);
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void gen6_reset_rps_interrupts(struct drm_i915_private *dev_priv);
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void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv);
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void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv);
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void gen6_rps_reset_ei(struct drm_i915_private *dev_priv);
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u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915, u32 mask);
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void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv);
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void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv);
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bool intel_irqs_enabled(struct drm_i915_private *dev_priv);
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void intel_synchronize_irq(struct drm_i915_private *i915);
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void intel_synchronize_hardirq(struct drm_i915_private *i915);
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2023-10-24 12:59:35 +02:00
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void gen3_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg);
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2023-08-30 17:31:07 +02:00
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void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
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i915_reg_t iir, i915_reg_t ier);
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void gen3_irq_init(struct intel_uncore *uncore,
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i915_reg_t imr, u32 imr_val,
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i915_reg_t ier, u32 ier_val,
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i915_reg_t iir);
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#define GEN8_IRQ_RESET_NDX(uncore, type, which) \
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({ \
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unsigned int which_ = which; \
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gen3_irq_reset((uncore), GEN8_##type##_IMR(which_), \
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GEN8_##type##_IIR(which_), GEN8_##type##_IER(which_)); \
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})
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#define GEN3_IRQ_RESET(uncore, type) \
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gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER)
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#define GEN8_IRQ_INIT_NDX(uncore, type, which, imr_val, ier_val) \
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({ \
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unsigned int which_ = which; \
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gen3_irq_init((uncore), \
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GEN8_##type##_IMR(which_), imr_val, \
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GEN8_##type##_IER(which_), ier_val, \
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GEN8_##type##_IIR(which_)); \
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})
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#define GEN3_IRQ_INIT(uncore, type, imr_val, ier_val) \
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gen3_irq_init((uncore), \
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type##IMR, imr_val, \
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type##IER, ier_val, \
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type##IIR)
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#endif /* __I915_IRQ_H__ */
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