2023-08-30 17:31:07 +02:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved
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*/
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#ifndef _DPU_HW_WB_H
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#define _DPU_HW_WB_H
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#include "dpu_hw_catalog.h"
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#include "dpu_hw_mdss.h"
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#include "dpu_hw_top.h"
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#include "dpu_hw_util.h"
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#include "dpu_hw_pingpong.h"
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struct dpu_hw_wb;
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struct dpu_hw_wb_cfg {
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struct dpu_hw_fmt_layout dest;
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enum dpu_intf_mode intf_mode;
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struct drm_rect roi;
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struct drm_rect crop;
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};
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/**
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*
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* struct dpu_hw_wb_ops : Interface to the wb hw driver functions
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* Assumption is these functions will be called after clocks are enabled
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* @setup_outaddress: setup output address from the writeback job
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* @setup_outformat: setup output format of writeback block from writeback job
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* @setup_qos_lut: setup qos LUT for writeback block based on input
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* @setup_cdp: setup chroma down prefetch block for writeback block
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* @bind_pingpong_blk: enable/disable the connection with ping-pong block
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*/
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struct dpu_hw_wb_ops {
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void (*setup_outaddress)(struct dpu_hw_wb *ctx,
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struct dpu_hw_wb_cfg *wb);
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void (*setup_outformat)(struct dpu_hw_wb *ctx,
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struct dpu_hw_wb_cfg *wb);
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void (*setup_roi)(struct dpu_hw_wb *ctx,
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struct dpu_hw_wb_cfg *wb);
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void (*setup_qos_lut)(struct dpu_hw_wb *ctx,
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2023-10-24 12:59:35 +02:00
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struct dpu_hw_qos_cfg *cfg);
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2023-08-30 17:31:07 +02:00
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void (*setup_cdp)(struct dpu_hw_wb *ctx,
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2023-10-24 12:59:35 +02:00
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const struct dpu_format *fmt,
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bool enable);
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2023-08-30 17:31:07 +02:00
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void (*bind_pingpong_blk)(struct dpu_hw_wb *ctx,
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2023-10-24 12:59:35 +02:00
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const enum dpu_pingpong pp);
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2023-08-30 17:31:07 +02:00
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};
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/**
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* struct dpu_hw_wb : WB driver object
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* @hw: block hardware details
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* @idx: hardware index number within type
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* @wb_hw_caps: hardware capabilities
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* @ops: function pointers
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*/
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struct dpu_hw_wb {
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struct dpu_hw_blk_reg_map hw;
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/* wb path */
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int idx;
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const struct dpu_wb_cfg *caps;
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/* ops */
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struct dpu_hw_wb_ops ops;
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};
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/**
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2023-10-24 12:59:35 +02:00
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* dpu_hw_wb_init() - Initializes the writeback hw driver object.
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* @cfg: wb_path catalog entry for which driver object is required
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2023-08-30 17:31:07 +02:00
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* @addr: mapped register io address of MDP
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2023-10-24 12:59:35 +02:00
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* Return: Error code or allocated dpu_hw_wb context
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2023-08-30 17:31:07 +02:00
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*/
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2023-10-24 12:59:35 +02:00
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struct dpu_hw_wb *dpu_hw_wb_init(const struct dpu_wb_cfg *cfg,
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void __iomem *addr);
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2023-08-30 17:31:07 +02:00
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/**
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* dpu_hw_wb_destroy(): Destroy writeback hw driver object.
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* @hw_wb: Pointer to writeback hw driver object
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*/
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void dpu_hw_wb_destroy(struct dpu_hw_wb *hw_wb);
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#endif /*_DPU_HW_WB_H */
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