327 lines
9.3 KiB
C
327 lines
9.3 KiB
C
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/*
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* Copyright 2021 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "priv.h"
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#include <nvfw/acr.h>
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static int
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ga102_acr_wpr_patch(struct nvkm_acr *acr, s64 adjust)
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{
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struct wpr_header_v2 hdr;
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struct lsb_header_v2 *lsb;
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struct nvkm_acr_lsfw *lsfw;
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u32 offset = 0;
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lsb = kvmalloc(sizeof(*lsb), GFP_KERNEL);
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if (!lsb)
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return -ENOMEM;
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do {
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nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr));
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wpr_header_v2_dump(&acr->subdev, &hdr);
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list_for_each_entry(lsfw, &acr->lsfw, head) {
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if (lsfw->id != hdr.wpr.falcon_id)
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continue;
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nvkm_robj(acr->wpr, hdr.wpr.lsb_offset, lsb, sizeof(*lsb));
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lsb_header_v2_dump(&acr->subdev, lsb);
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lsfw->func->bld_patch(acr, lsb->bl_data_off, adjust);
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break;
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}
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offset += sizeof(hdr);
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} while (hdr.wpr.falcon_id != WPR_HEADER_V1_FALCON_ID_INVALID);
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kvfree(lsb);
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return 0;
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}
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static int
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ga102_acr_wpr_build_lsb(struct nvkm_acr *acr, struct nvkm_acr_lsfw *lsfw)
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{
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struct lsb_header_v2 *hdr;
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int ret = 0;
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if (WARN_ON(lsfw->sig->size != sizeof(hdr->signature)))
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return -EINVAL;
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hdr = kvzalloc(sizeof(*hdr), GFP_KERNEL);
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if (!hdr)
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return -ENOMEM;
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hdr->hdr.identifier = WPR_GENERIC_HEADER_ID_LSF_LSB_HEADER;
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hdr->hdr.version = 2;
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hdr->hdr.size = sizeof(*hdr);
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memcpy(&hdr->signature, lsfw->sig->data, lsfw->sig->size);
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hdr->ucode_off = lsfw->offset.img;
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hdr->ucode_size = lsfw->ucode_size;
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hdr->data_size = lsfw->data_size;
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hdr->bl_code_size = lsfw->bootloader_size;
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hdr->bl_imem_off = lsfw->bootloader_imem_offset;
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hdr->bl_data_off = lsfw->offset.bld;
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hdr->bl_data_size = lsfw->bl_data_size;
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hdr->app_code_off = lsfw->app_start_offset + lsfw->app_resident_code_offset;
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hdr->app_code_size = ALIGN(lsfw->app_resident_code_size, 0x100);
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hdr->app_data_off = lsfw->app_start_offset + lsfw->app_resident_data_offset;
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hdr->app_data_size = ALIGN(lsfw->app_resident_data_size, 0x100);
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hdr->app_imem_offset = lsfw->app_imem_offset;
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hdr->app_dmem_offset = lsfw->app_dmem_offset;
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hdr->flags = lsfw->func->flags;
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hdr->monitor_code_offset = 0;
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hdr->monitor_data_offset = 0;
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hdr->manifest_offset = 0;
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if (lsfw->secure_bootloader) {
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struct nvkm_falcon_fw fw = {
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.fw.img = hdr->hs_fmc_params.pkc_signature,
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.fw.name = "LSFW",
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.func = &(const struct nvkm_falcon_fw_func) {
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.signature = ga100_flcn_fw_signature,
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},
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.sig_size = lsfw->sig_size,
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.sig_nr = lsfw->sig_nr,
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.sigs = lsfw->sigs,
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.fuse_ver = lsfw->fuse_ver,
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.engine_id = lsfw->engine_id,
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.ucode_id = lsfw->ucode_id,
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.falcon = lsfw->falcon,
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};
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ret = nvkm_falcon_get(fw.falcon, &acr->subdev);
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if (ret == 0) {
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hdr->hs_fmc_params.hs_fmc = 1;
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hdr->hs_fmc_params.pkc_algo = 0;
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hdr->hs_fmc_params.pkc_algo_version = 1;
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hdr->hs_fmc_params.engid_mask = lsfw->engine_id;
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hdr->hs_fmc_params.ucode_id = lsfw->ucode_id;
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hdr->hs_fmc_params.fuse_ver = lsfw->fuse_ver;
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ret = nvkm_falcon_fw_patch(&fw);
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nvkm_falcon_put(fw.falcon, &acr->subdev);
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}
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}
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nvkm_wobj(acr->wpr, lsfw->offset.lsb, hdr, sizeof(*hdr));
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kvfree(hdr);
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return ret;
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}
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static int
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ga102_acr_wpr_build(struct nvkm_acr *acr, struct nvkm_acr_lsf *rtos)
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{
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struct nvkm_acr_lsfw *lsfw;
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struct wpr_header_v2 hdr;
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u32 offset = 0;
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int ret;
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/*XXX: shared sub-WPR headers, fill terminator for now. */
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nvkm_wo32(acr->wpr, 0x300, (2 << 16) | WPR_GENERIC_HEADER_ID_LSF_SHARED_SUB_WPR);
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nvkm_wo32(acr->wpr, 0x304, 0x14);
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nvkm_wo32(acr->wpr, 0x308, 0xffffffff);
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nvkm_wo32(acr->wpr, 0x30c, 0);
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nvkm_wo32(acr->wpr, 0x310, 0);
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/* Fill per-LSF structures. */
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list_for_each_entry(lsfw, &acr->lsfw, head) {
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struct lsf_signature_v2 *sig = (void *)lsfw->sig->data;
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hdr.hdr.identifier = WPR_GENERIC_HEADER_ID_LSF_WPR_HEADER;
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hdr.hdr.version = 2;
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hdr.hdr.size = sizeof(hdr);
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hdr.wpr.falcon_id = lsfw->id;
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hdr.wpr.lsb_offset = lsfw->offset.lsb;
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hdr.wpr.bootstrap_owner = NVKM_ACR_LSF_GSPLITE;
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hdr.wpr.lazy_bootstrap = 1;
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hdr.wpr.bin_version = sig->ls_ucode_version;
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hdr.wpr.status = WPR_HEADER_V1_STATUS_COPY;
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/* Write WPR header. */
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nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr));
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offset += sizeof(hdr);
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/* Write LSB header. */
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ret = ga102_acr_wpr_build_lsb(acr, lsfw);
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if (ret)
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return ret;
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/* Write ucode image. */
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nvkm_wobj(acr->wpr, lsfw->offset.img,
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lsfw->img.data,
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lsfw->img.size);
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/* Write bootloader data. */
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lsfw->func->bld_write(acr, lsfw->offset.bld, lsfw);
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}
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/* Finalise WPR. */
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hdr.hdr.identifier = WPR_GENERIC_HEADER_ID_LSF_WPR_HEADER;
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hdr.hdr.version = 2;
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hdr.hdr.size = sizeof(hdr);
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hdr.wpr.falcon_id = WPR_HEADER_V1_FALCON_ID_INVALID;
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nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr));
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return 0;
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}
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static u32
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ga102_acr_wpr_layout(struct nvkm_acr *acr)
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{
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struct nvkm_acr_lsfw *lsfw;
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u32 wpr = 0;
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wpr += 21 /* MAX_LSF */ * sizeof(struct wpr_header_v2);
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wpr = ALIGN(wpr, 256);
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wpr += 0x100; /* Shared sub-WPR headers. */
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list_for_each_entry(lsfw, &acr->lsfw, head) {
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wpr = ALIGN(wpr, 256);
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lsfw->offset.lsb = wpr;
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wpr += sizeof(struct lsb_header_v2);
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wpr = ALIGN(wpr, 4096);
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lsfw->offset.img = wpr;
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wpr += lsfw->img.size;
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wpr = ALIGN(wpr, 256);
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lsfw->offset.bld = wpr;
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lsfw->bl_data_size = ALIGN(lsfw->func->bld_size, 256);
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wpr += lsfw->bl_data_size;
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}
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return wpr;
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}
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static int
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ga102_acr_wpr_parse(struct nvkm_acr *acr)
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{
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const struct wpr_header_v2 *hdr = (void *)acr->wpr_fw->data;
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while (hdr->wpr.falcon_id != WPR_HEADER_V1_FALCON_ID_INVALID) {
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wpr_header_v2_dump(&acr->subdev, hdr);
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if (!nvkm_acr_lsfw_add(NULL, acr, NULL, (hdr++)->wpr.falcon_id))
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return -ENOMEM;
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}
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return 0;
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}
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MODULE_FIRMWARE("nvidia/ga102/acr/ucode_unload.bin");
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MODULE_FIRMWARE("nvidia/ga103/acr/ucode_unload.bin");
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MODULE_FIRMWARE("nvidia/ga104/acr/ucode_unload.bin");
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MODULE_FIRMWARE("nvidia/ga106/acr/ucode_unload.bin");
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MODULE_FIRMWARE("nvidia/ga107/acr/ucode_unload.bin");
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static const struct nvkm_acr_hsf_fwif
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ga102_acr_unload_fwif[] = {
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{ 0, ga100_acr_hsfw_ctor, &ga102_flcn_fw, NVKM_ACR_HSF_SEC2 },
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{}
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};
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MODULE_FIRMWARE("nvidia/ga102/acr/ucode_asb.bin");
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MODULE_FIRMWARE("nvidia/ga103/acr/ucode_asb.bin");
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MODULE_FIRMWARE("nvidia/ga104/acr/ucode_asb.bin");
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MODULE_FIRMWARE("nvidia/ga106/acr/ucode_asb.bin");
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MODULE_FIRMWARE("nvidia/ga107/acr/ucode_asb.bin");
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static const struct nvkm_acr_hsf_fwif
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ga102_acr_asb_fwif[] = {
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{ 0, ga100_acr_hsfw_ctor, &ga102_flcn_fw, NVKM_ACR_HSF_GSP },
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{}
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};
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static const struct nvkm_falcon_fw_func
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ga102_acr_ahesasc_0 = {
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.signature = ga100_flcn_fw_signature,
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.reset = gm200_flcn_fw_reset,
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.setup = gp102_acr_load_setup,
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.load = ga102_flcn_fw_load,
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.boot = ga102_flcn_fw_boot,
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};
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MODULE_FIRMWARE("nvidia/ga102/acr/ucode_ahesasc.bin");
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MODULE_FIRMWARE("nvidia/ga103/acr/ucode_ahesasc.bin");
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MODULE_FIRMWARE("nvidia/ga104/acr/ucode_ahesasc.bin");
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MODULE_FIRMWARE("nvidia/ga106/acr/ucode_ahesasc.bin");
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MODULE_FIRMWARE("nvidia/ga107/acr/ucode_ahesasc.bin");
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static const struct nvkm_acr_hsf_fwif
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ga102_acr_ahesasc_fwif[] = {
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{ 0, ga100_acr_hsfw_ctor, &ga102_acr_ahesasc_0, NVKM_ACR_HSF_SEC2 },
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{}
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};
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static const struct nvkm_acr_func
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ga102_acr = {
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.ahesasc = ga102_acr_ahesasc_fwif,
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.asb = ga102_acr_asb_fwif,
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.unload = ga102_acr_unload_fwif,
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.wpr_parse = ga102_acr_wpr_parse,
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.wpr_layout = ga102_acr_wpr_layout,
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.wpr_alloc = gp102_acr_wpr_alloc,
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.wpr_patch = ga102_acr_wpr_patch,
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.wpr_build = ga102_acr_wpr_build,
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.wpr_check = ga100_acr_wpr_check,
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.init = tu102_acr_init,
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};
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static int
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ga102_acr_load(struct nvkm_acr *acr, int version,
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const struct nvkm_acr_fwif *fwif)
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{
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struct nvkm_subdev *subdev = &acr->subdev;
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const struct nvkm_acr_hsf_fwif *hsfwif;
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hsfwif = nvkm_firmware_load(subdev, fwif->func->ahesasc, "AcrAHESASC",
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acr, NULL, "acr/ucode_ahesasc", "AHESASC");
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if (IS_ERR(hsfwif))
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return PTR_ERR(hsfwif);
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hsfwif = nvkm_firmware_load(subdev, fwif->func->asb, "AcrASB",
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acr, NULL, "acr/ucode_asb", "ASB");
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if (IS_ERR(hsfwif))
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return PTR_ERR(hsfwif);
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hsfwif = nvkm_firmware_load(subdev, fwif->func->unload, "AcrUnload",
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acr, NULL, "acr/ucode_unload", "unload");
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if (IS_ERR(hsfwif))
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return PTR_ERR(hsfwif);
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return 0;
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}
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static const struct nvkm_acr_fwif
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ga102_acr_fwif[] = {
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{ 0, ga102_acr_load, &ga102_acr },
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{ -1, gm200_acr_nofw, &gm200_acr },
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{}
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};
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int
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ga102_acr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
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struct nvkm_acr **pacr)
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{
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return nvkm_acr_new_(ga102_acr_fwif, device, type, inst, pacr);
|
||
|
|
}
|