316 lines
7.9 KiB
C
316 lines
7.9 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/* Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net> */
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#include <linux/bitfield.h>
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#include <linux/component.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of_graph.h>
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#include <linux/platform_device.h>
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#include <dt-bindings/clock/sun8i-tcon-top.h>
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#include "sun8i_tcon_top.h"
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struct sun8i_tcon_top_quirks {
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bool has_tcon_tv1;
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bool has_dsi;
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};
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static bool sun8i_tcon_top_node_is_tcon_top(struct device_node *node)
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{
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return !!of_match_node(sun8i_tcon_top_of_table, node);
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}
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int sun8i_tcon_top_set_hdmi_src(struct device *dev, int tcon)
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{
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struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev);
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unsigned long flags;
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u32 val;
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if (!sun8i_tcon_top_node_is_tcon_top(dev->of_node)) {
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dev_err(dev, "Device is not TCON TOP!\n");
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return -EINVAL;
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}
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if (tcon < 2 || tcon > 3) {
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dev_err(dev, "TCON index must be 2 or 3!\n");
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return -EINVAL;
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}
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spin_lock_irqsave(&tcon_top->reg_lock, flags);
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val = readl(tcon_top->regs + TCON_TOP_GATE_SRC_REG);
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val &= ~TCON_TOP_HDMI_SRC_MSK;
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val |= FIELD_PREP(TCON_TOP_HDMI_SRC_MSK, tcon - 1);
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writel(val, tcon_top->regs + TCON_TOP_GATE_SRC_REG);
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spin_unlock_irqrestore(&tcon_top->reg_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(sun8i_tcon_top_set_hdmi_src);
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int sun8i_tcon_top_de_config(struct device *dev, int mixer, int tcon)
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{
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struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev);
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unsigned long flags;
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u32 reg;
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if (!sun8i_tcon_top_node_is_tcon_top(dev->of_node)) {
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dev_err(dev, "Device is not TCON TOP!\n");
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return -EINVAL;
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}
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if (mixer > 1) {
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dev_err(dev, "Mixer index is too high!\n");
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return -EINVAL;
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}
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if (tcon > 3) {
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dev_err(dev, "TCON index is too high!\n");
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return -EINVAL;
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}
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spin_lock_irqsave(&tcon_top->reg_lock, flags);
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reg = readl(tcon_top->regs + TCON_TOP_PORT_SEL_REG);
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if (mixer == 0) {
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reg &= ~TCON_TOP_PORT_DE0_MSK;
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reg |= FIELD_PREP(TCON_TOP_PORT_DE0_MSK, tcon);
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} else {
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reg &= ~TCON_TOP_PORT_DE1_MSK;
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reg |= FIELD_PREP(TCON_TOP_PORT_DE1_MSK, tcon);
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}
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writel(reg, tcon_top->regs + TCON_TOP_PORT_SEL_REG);
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spin_unlock_irqrestore(&tcon_top->reg_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(sun8i_tcon_top_de_config);
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static struct clk_hw *sun8i_tcon_top_register_gate(struct device *dev,
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const char *parent,
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void __iomem *regs,
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spinlock_t *lock,
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u8 bit, int name_index)
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{
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const char *clk_name, *parent_name;
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int ret, index;
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index = of_property_match_string(dev->of_node, "clock-names", parent);
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if (index < 0)
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return ERR_PTR(index);
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parent_name = of_clk_get_parent_name(dev->of_node, index);
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ret = of_property_read_string_index(dev->of_node,
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"clock-output-names", name_index,
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&clk_name);
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if (ret)
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return ERR_PTR(ret);
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return clk_hw_register_gate(dev, clk_name, parent_name,
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CLK_SET_RATE_PARENT,
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regs + TCON_TOP_GATE_SRC_REG,
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bit, 0, lock);
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};
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static int sun8i_tcon_top_bind(struct device *dev, struct device *master,
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void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct clk_hw_onecell_data *clk_data;
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struct sun8i_tcon_top *tcon_top;
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const struct sun8i_tcon_top_quirks *quirks;
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void __iomem *regs;
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int ret, i;
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quirks = of_device_get_match_data(&pdev->dev);
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tcon_top = devm_kzalloc(dev, sizeof(*tcon_top), GFP_KERNEL);
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if (!tcon_top)
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return -ENOMEM;
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clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, CLK_NUM),
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GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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tcon_top->clk_data = clk_data;
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spin_lock_init(&tcon_top->reg_lock);
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tcon_top->rst = devm_reset_control_get(dev, NULL);
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if (IS_ERR(tcon_top->rst)) {
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dev_err(dev, "Couldn't get our reset line\n");
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return PTR_ERR(tcon_top->rst);
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}
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tcon_top->bus = devm_clk_get(dev, "bus");
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if (IS_ERR(tcon_top->bus)) {
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dev_err(dev, "Couldn't get the bus clock\n");
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return PTR_ERR(tcon_top->bus);
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}
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regs = devm_platform_ioremap_resource(pdev, 0);
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tcon_top->regs = regs;
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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ret = reset_control_deassert(tcon_top->rst);
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if (ret) {
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dev_err(dev, "Could not deassert ctrl reset control\n");
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return ret;
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}
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ret = clk_prepare_enable(tcon_top->bus);
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if (ret) {
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dev_err(dev, "Could not enable bus clock\n");
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goto err_assert_reset;
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}
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/*
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* At least on H6, some registers have some bits set by default
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* which may cause issues. Clear them here.
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*/
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writel(0, regs + TCON_TOP_PORT_SEL_REG);
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writel(0, regs + TCON_TOP_GATE_SRC_REG);
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/*
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* TCON TOP has two muxes, which select parent clock for each TCON TV
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* channel clock. Parent could be either TCON TV or TVE clock. For now
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* we leave this fixed to TCON TV, since TVE driver for R40 is not yet
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* implemented. Once it is, graph needs to be traversed to determine
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* if TVE is active on each TCON TV. If it is, mux should be switched
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* to TVE clock parent.
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*/
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i = 0;
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clk_data->hws[CLK_TCON_TOP_TV0] =
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sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs,
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&tcon_top->reg_lock,
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TCON_TOP_TCON_TV0_GATE, i++);
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if (quirks->has_tcon_tv1)
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clk_data->hws[CLK_TCON_TOP_TV1] =
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sun8i_tcon_top_register_gate(dev, "tcon-tv1", regs,
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&tcon_top->reg_lock,
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TCON_TOP_TCON_TV1_GATE, i++);
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if (quirks->has_dsi)
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clk_data->hws[CLK_TCON_TOP_DSI] =
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sun8i_tcon_top_register_gate(dev, "dsi", regs,
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&tcon_top->reg_lock,
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TCON_TOP_TCON_DSI_GATE, i++);
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for (i = 0; i < CLK_NUM; i++)
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if (IS_ERR(clk_data->hws[i])) {
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ret = PTR_ERR(clk_data->hws[i]);
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goto err_unregister_gates;
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}
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clk_data->num = CLK_NUM;
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ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
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clk_data);
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if (ret)
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goto err_unregister_gates;
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dev_set_drvdata(dev, tcon_top);
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return 0;
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err_unregister_gates:
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for (i = 0; i < CLK_NUM; i++)
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if (!IS_ERR_OR_NULL(clk_data->hws[i]))
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clk_hw_unregister_gate(clk_data->hws[i]);
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clk_disable_unprepare(tcon_top->bus);
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err_assert_reset:
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reset_control_assert(tcon_top->rst);
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return ret;
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}
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static void sun8i_tcon_top_unbind(struct device *dev, struct device *master,
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void *data)
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{
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struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev);
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struct clk_hw_onecell_data *clk_data = tcon_top->clk_data;
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int i;
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of_clk_del_provider(dev->of_node);
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for (i = 0; i < CLK_NUM; i++)
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if (clk_data->hws[i])
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clk_hw_unregister_gate(clk_data->hws[i]);
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clk_disable_unprepare(tcon_top->bus);
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reset_control_assert(tcon_top->rst);
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}
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static const struct component_ops sun8i_tcon_top_ops = {
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.bind = sun8i_tcon_top_bind,
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.unbind = sun8i_tcon_top_unbind,
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};
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static int sun8i_tcon_top_probe(struct platform_device *pdev)
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{
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return component_add(&pdev->dev, &sun8i_tcon_top_ops);
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}
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static int sun8i_tcon_top_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &sun8i_tcon_top_ops);
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return 0;
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}
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static const struct sun8i_tcon_top_quirks sun8i_r40_tcon_top_quirks = {
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.has_tcon_tv1 = true,
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.has_dsi = true,
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};
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static const struct sun8i_tcon_top_quirks sun20i_d1_tcon_top_quirks = {
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.has_dsi = true,
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};
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static const struct sun8i_tcon_top_quirks sun50i_h6_tcon_top_quirks = {
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/* Nothing special */
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};
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/* sun4i_drv uses this list to check if a device node is a TCON TOP */
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const struct of_device_id sun8i_tcon_top_of_table[] = {
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{
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.compatible = "allwinner,sun8i-r40-tcon-top",
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.data = &sun8i_r40_tcon_top_quirks
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},
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{
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.compatible = "allwinner,sun20i-d1-tcon-top",
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.data = &sun20i_d1_tcon_top_quirks
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},
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{
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.compatible = "allwinner,sun50i-h6-tcon-top",
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.data = &sun50i_h6_tcon_top_quirks
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},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, sun8i_tcon_top_of_table);
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EXPORT_SYMBOL(sun8i_tcon_top_of_table);
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static struct platform_driver sun8i_tcon_top_platform_driver = {
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.probe = sun8i_tcon_top_probe,
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.remove = sun8i_tcon_top_remove,
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.driver = {
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.name = "sun8i-tcon-top",
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.of_match_table = sun8i_tcon_top_of_table,
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},
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};
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module_platform_driver(sun8i_tcon_top_platform_driver);
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MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
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MODULE_DESCRIPTION("Allwinner R40 TCON TOP driver");
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MODULE_LICENSE("GPL");
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