2023-08-30 17:31:07 +02:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// Driver for TPS65219 Integrated Power Management Integrated Chips (PMIC)
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//
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// Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/
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#include <linux/i2c.h>
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#include <linux/reboot.h>
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#include <linux/regmap.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/tps65219.h>
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static int tps65219_warm_reset(struct tps65219 *tps)
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{
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return regmap_update_bits(tps->regmap, TPS65219_REG_MFP_CTRL,
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TPS65219_MFP_WARM_RESET_I2C_CTRL_MASK,
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TPS65219_MFP_WARM_RESET_I2C_CTRL_MASK);
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}
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static int tps65219_cold_reset(struct tps65219 *tps)
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{
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return regmap_update_bits(tps->regmap, TPS65219_REG_MFP_CTRL,
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TPS65219_MFP_COLD_RESET_I2C_CTRL_MASK,
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TPS65219_MFP_COLD_RESET_I2C_CTRL_MASK);
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}
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2023-10-24 12:59:35 +02:00
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static int tps65219_soft_shutdown(struct tps65219 *tps)
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2023-08-30 17:31:07 +02:00
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{
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2023-10-24 12:59:35 +02:00
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return regmap_update_bits(tps->regmap, TPS65219_REG_MFP_CTRL,
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TPS65219_MFP_I2C_OFF_REQ_MASK,
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TPS65219_MFP_I2C_OFF_REQ_MASK);
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}
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2023-08-30 17:31:07 +02:00
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2023-10-24 12:59:35 +02:00
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static int tps65219_power_off_handler(struct sys_off_data *data)
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{
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tps65219_soft_shutdown(data->cb_data);
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return NOTIFY_DONE;
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}
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2023-08-30 17:31:07 +02:00
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2023-10-24 12:59:35 +02:00
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static int tps65219_restart(struct tps65219 *tps, unsigned long reboot_mode)
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{
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2023-08-30 17:31:07 +02:00
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if (reboot_mode == REBOOT_WARM)
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tps65219_warm_reset(tps);
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else
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tps65219_cold_reset(tps);
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return NOTIFY_DONE;
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}
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2023-10-24 12:59:35 +02:00
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static int tps65219_restart_handler(struct sys_off_data *data)
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{
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tps65219_restart(data->cb_data, data->mode);
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return NOTIFY_DONE;
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}
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2023-08-30 17:31:07 +02:00
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static const struct resource tps65219_pwrbutton_resources[] = {
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_PB_FALLING_EDGE_DETECT, "falling"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_PB_RISING_EDGE_DETECT, "rising"),
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};
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static const struct resource tps65219_regulator_resources[] = {
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_SCG, "LDO3_SCG"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_OC, "LDO3_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_UV, "LDO3_UV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_SCG, "LDO4_SCG"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_OC, "LDO4_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_UV, "LDO4_UV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_SCG, "LDO1_SCG"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_OC, "LDO1_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_UV, "LDO1_UV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_SCG, "LDO2_SCG"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_OC, "LDO2_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_UV, "LDO2_UV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_SCG, "BUCK3_SCG"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_OC, "BUCK3_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_NEG_OC, "BUCK3_NEG_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_UV, "BUCK3_UV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_SCG, "BUCK1_SCG"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_OC, "BUCK1_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_NEG_OC, "BUCK1_NEG_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_UV, "BUCK1_UV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_SCG, "BUCK2_SCG"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_OC, "BUCK2_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_NEG_OC, "BUCK2_NEG_OC"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_UV, "BUCK2_UV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV, "BUCK1_RV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV, "BUCK2_RV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV, "BUCK3_RV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_RV, "LDO1_RV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_RV, "LDO2_RV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_RV, "LDO3_RV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_RV, "LDO4_RV"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV_SD, "BUCK1_RV_SD"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV_SD, "BUCK2_RV_SD"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV_SD, "BUCK3_RV_SD"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_RV_SD, "LDO1_RV_SD"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_RV_SD, "LDO2_RV_SD"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_RV_SD, "LDO3_RV_SD"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_RV_SD, "LDO4_RV_SD"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_TIMEOUT, "TIMEOUT"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_3_WARM, "SENSOR_3_WARM"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_WARM, "SENSOR_2_WARM"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_WARM, "SENSOR_1_WARM"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_WARM, "SENSOR_0_WARM"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_3_HOT, "SENSOR_3_HOT"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_HOT, "SENSOR_2_HOT"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_HOT, "SENSOR_1_HOT"),
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DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_HOT, "SENSOR_0_HOT"),
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};
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static const struct mfd_cell tps65219_cells[] = {
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{
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.name = "tps65219-regulator",
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.resources = tps65219_regulator_resources,
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.num_resources = ARRAY_SIZE(tps65219_regulator_resources),
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},
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2023-10-24 12:59:35 +02:00
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{ .name = "tps65219-gpio", },
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2023-08-30 17:31:07 +02:00
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};
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static const struct mfd_cell tps65219_pwrbutton_cell = {
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.name = "tps65219-pwrbutton",
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.resources = tps65219_pwrbutton_resources,
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.num_resources = ARRAY_SIZE(tps65219_pwrbutton_resources),
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};
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static const struct regmap_config tps65219_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = TPS65219_REG_FACTORY_CONFIG_2,
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};
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/*
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* Mapping of main IRQ register bits to sub-IRQ register offsets so that we can
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* access corect sub-IRQ registers based on bits that are set in main IRQ
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* register.
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*/
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/* Timeout Residual Voltage Shutdown */
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static unsigned int bit0_offsets[] = { TPS65219_REG_INT_TO_RV_POS };
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static unsigned int bit1_offsets[] = { TPS65219_REG_INT_RV_POS }; /* Residual Voltage */
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static unsigned int bit2_offsets[] = { TPS65219_REG_INT_SYS_POS }; /* System */
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static unsigned int bit3_offsets[] = { TPS65219_REG_INT_BUCK_1_2_POS }; /* Buck 1-2 */
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static unsigned int bit4_offsets[] = { TPS65219_REG_INT_BUCK_3_POS }; /* Buck 3 */
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static unsigned int bit5_offsets[] = { TPS65219_REG_INT_LDO_1_2_POS }; /* LDO 1-2 */
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static unsigned int bit6_offsets[] = { TPS65219_REG_INT_LDO_3_4_POS }; /* LDO 3-4 */
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static unsigned int bit7_offsets[] = { TPS65219_REG_INT_PB_POS }; /* Power Button */
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static struct regmap_irq_sub_irq_map tps65219_sub_irq_offsets[] = {
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REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets),
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REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets),
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REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets),
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REGMAP_IRQ_MAIN_REG_OFFSET(bit3_offsets),
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REGMAP_IRQ_MAIN_REG_OFFSET(bit4_offsets),
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REGMAP_IRQ_MAIN_REG_OFFSET(bit5_offsets),
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REGMAP_IRQ_MAIN_REG_OFFSET(bit6_offsets),
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REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets),
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};
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#define TPS65219_REGMAP_IRQ_REG(int_name, register_position) \
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REGMAP_IRQ_REG(int_name, register_position, int_name##_MASK)
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static struct regmap_irq tps65219_irqs[] = {
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_SCG, TPS65219_REG_INT_LDO_3_4_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_OC, TPS65219_REG_INT_LDO_3_4_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_UV, TPS65219_REG_INT_LDO_3_4_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_SCG, TPS65219_REG_INT_LDO_3_4_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_OC, TPS65219_REG_INT_LDO_3_4_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_UV, TPS65219_REG_INT_LDO_3_4_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_SCG, TPS65219_REG_INT_LDO_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_OC, TPS65219_REG_INT_LDO_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_UV, TPS65219_REG_INT_LDO_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_SCG, TPS65219_REG_INT_LDO_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_OC, TPS65219_REG_INT_LDO_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_UV, TPS65219_REG_INT_LDO_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_SCG, TPS65219_REG_INT_BUCK_3_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_OC, TPS65219_REG_INT_BUCK_3_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_NEG_OC, TPS65219_REG_INT_BUCK_3_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_UV, TPS65219_REG_INT_BUCK_3_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_SCG, TPS65219_REG_INT_BUCK_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_OC, TPS65219_REG_INT_BUCK_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_NEG_OC, TPS65219_REG_INT_BUCK_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_UV, TPS65219_REG_INT_BUCK_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_SCG, TPS65219_REG_INT_BUCK_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_OC, TPS65219_REG_INT_BUCK_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_NEG_OC, TPS65219_REG_INT_BUCK_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_UV, TPS65219_REG_INT_BUCK_1_2_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_3_WARM, TPS65219_REG_INT_SYS_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_WARM, TPS65219_REG_INT_SYS_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_WARM, TPS65219_REG_INT_SYS_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_WARM, TPS65219_REG_INT_SYS_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_3_HOT, TPS65219_REG_INT_SYS_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_HOT, TPS65219_REG_INT_SYS_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_HOT, TPS65219_REG_INT_SYS_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_HOT, TPS65219_REG_INT_SYS_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV, TPS65219_REG_INT_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV, TPS65219_REG_INT_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV, TPS65219_REG_INT_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_RV, TPS65219_REG_INT_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_RV, TPS65219_REG_INT_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_RV, TPS65219_REG_INT_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_RV, TPS65219_REG_INT_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV_SD, TPS65219_REG_INT_TO_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV_SD, TPS65219_REG_INT_TO_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV_SD, TPS65219_REG_INT_TO_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_RV_SD, TPS65219_REG_INT_TO_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_RV_SD, TPS65219_REG_INT_TO_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_RV_SD, TPS65219_REG_INT_TO_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_RV_SD, TPS65219_REG_INT_TO_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_TIMEOUT, TPS65219_REG_INT_TO_RV_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_FALLING_EDGE_DETECT, TPS65219_REG_INT_PB_POS),
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TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_RISING_EDGE_DETECT, TPS65219_REG_INT_PB_POS),
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|
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};
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|
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|
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|
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static struct regmap_irq_chip tps65219_irq_chip = {
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|
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.name = "tps65219_irq",
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|
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.main_status = TPS65219_REG_INT_SOURCE,
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|
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.num_main_regs = 1,
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|
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.num_main_status_bits = 8,
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|
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.irqs = tps65219_irqs,
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|
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.num_irqs = ARRAY_SIZE(tps65219_irqs),
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|
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.status_base = TPS65219_REG_INT_LDO_3_4,
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|
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.ack_base = TPS65219_REG_INT_LDO_3_4,
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|
|
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.clear_ack = 1,
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|
|
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.num_regs = 8,
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|
|
|
.sub_reg_offsets = tps65219_sub_irq_offsets,
|
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|
|
|
};
|
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|
|
|
|
|
|
|
|
static int tps65219_probe(struct i2c_client *client)
|
|
|
|
|
{
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|
|
|
struct tps65219 *tps;
|
|
|
|
|
unsigned int chipid;
|
|
|
|
|
bool pwr_button;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
|
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|
|
|
if (!tps)
|
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|
|
|
return -ENOMEM;
|
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|
|
|
|
|
|
|
|
i2c_set_clientdata(client, tps);
|
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|
|
|
|
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|
|
|
tps->dev = &client->dev;
|
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|
|
|
|
|
|
|
|
tps->regmap = devm_regmap_init_i2c(client, &tps65219_regmap_config);
|
|
|
|
|
if (IS_ERR(tps->regmap)) {
|
|
|
|
|
ret = PTR_ERR(tps->regmap);
|
|
|
|
|
dev_err(tps->dev, "Failed to allocate register map: %d\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ret = devm_regmap_add_irq_chip(&client->dev, tps->regmap, client->irq,
|
|
|
|
|
IRQF_ONESHOT, 0, &tps65219_irq_chip,
|
|
|
|
|
&tps->irq_data);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
|
|
ret = regmap_read(tps->regmap, TPS65219_REG_TI_DEV_ID, &chipid);
|
|
|
|
|
if (ret) {
|
|
|
|
|
dev_err(tps->dev, "Failed to read device ID: %d\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ret = devm_mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO,
|
|
|
|
|
tps65219_cells, ARRAY_SIZE(tps65219_cells),
|
|
|
|
|
NULL, 0, regmap_irq_get_domain(tps->irq_data));
|
|
|
|
|
if (ret) {
|
|
|
|
|
dev_err(tps->dev, "Failed to add child devices: %d\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
pwr_button = of_property_read_bool(tps->dev->of_node, "ti,power-button");
|
|
|
|
|
if (pwr_button) {
|
|
|
|
|
ret = devm_mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO,
|
|
|
|
|
&tps65219_pwrbutton_cell, 1, NULL, 0,
|
|
|
|
|
regmap_irq_get_domain(tps->irq_data));
|
|
|
|
|
if (ret) {
|
|
|
|
|
dev_err(tps->dev, "Failed to add power-button: %d\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
ret = devm_register_restart_handler(tps->dev,
|
|
|
|
|
tps65219_restart_handler,
|
|
|
|
|
tps);
|
|
|
|
|
|
2023-08-30 17:31:07 +02:00
|
|
|
if (ret) {
|
|
|
|
|
dev_err(tps->dev, "cannot register restart handler, %d\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
ret = devm_register_power_off_handler(tps->dev,
|
|
|
|
|
tps65219_power_off_handler,
|
|
|
|
|
tps);
|
|
|
|
|
if (ret) {
|
|
|
|
|
dev_err(tps->dev, "failed to register power-off handler: %d\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
2023-08-30 17:31:07 +02:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const struct of_device_id of_tps65219_match_table[] = {
|
|
|
|
|
{ .compatible = "ti,tps65219", },
|
|
|
|
|
{}
|
|
|
|
|
};
|
|
|
|
|
MODULE_DEVICE_TABLE(of, of_tps65219_match_table);
|
|
|
|
|
|
|
|
|
|
static struct i2c_driver tps65219_driver = {
|
|
|
|
|
.driver = {
|
|
|
|
|
.name = "tps65219",
|
|
|
|
|
.of_match_table = of_tps65219_match_table,
|
|
|
|
|
},
|
2023-10-24 12:59:35 +02:00
|
|
|
.probe = tps65219_probe,
|
2023-08-30 17:31:07 +02:00
|
|
|
};
|
|
|
|
|
module_i2c_driver(tps65219_driver);
|
|
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Jerome Neanne <jneanne@baylibre.com>");
|
|
|
|
|
MODULE_DESCRIPTION("TPS65219 power management IC driver");
|
|
|
|
|
MODULE_LICENSE("GPL");
|
