2023-08-30 17:31:07 +02:00
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/*
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* Atheros CARL9170 driver
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*
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* Basic HW register/memory/command access functions
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*
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* Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, see
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* http://www.gnu.org/licenses/.
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*
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* This file incorporates work covered by the following copyright and
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* permission notice:
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* Copyright (c) 2007-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <asm/div64.h>
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#include "carl9170.h"
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#include "cmd.h"
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int carl9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val)
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{
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const __le32 buf[2] = {
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cpu_to_le32(reg),
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cpu_to_le32(val),
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};
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int err;
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err = carl9170_exec_cmd(ar, CARL9170_CMD_WREG, sizeof(buf),
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(u8 *) buf, 0, NULL);
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if (err) {
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if (net_ratelimit()) {
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wiphy_err(ar->hw->wiphy, "writing reg %#x "
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"(val %#x) failed (%d)\n", reg, val, err);
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}
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}
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return err;
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}
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int carl9170_read_mreg(struct ar9170 *ar, const int nregs,
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const u32 *regs, u32 *out)
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{
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int i, err;
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__le32 *offs, *res;
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/* abuse "out" for the register offsets, must be same length */
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offs = (__le32 *)out;
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for (i = 0; i < nregs; i++)
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offs[i] = cpu_to_le32(regs[i]);
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/* also use the same buffer for the input */
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res = (__le32 *)out;
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err = carl9170_exec_cmd(ar, CARL9170_CMD_RREG,
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4 * nregs, (u8 *)offs,
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4 * nregs, (u8 *)res);
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if (err) {
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if (net_ratelimit()) {
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wiphy_err(ar->hw->wiphy, "reading regs failed (%d)\n",
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err);
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}
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return err;
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}
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/* convert result to cpu endian */
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for (i = 0; i < nregs; i++)
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out[i] = le32_to_cpu(res[i]);
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return 0;
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}
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int carl9170_read_reg(struct ar9170 *ar, u32 reg, u32 *val)
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{
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return carl9170_read_mreg(ar, 1, ®, val);
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}
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int carl9170_echo_test(struct ar9170 *ar, const u32 v)
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{
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u32 echores;
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int err;
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err = carl9170_exec_cmd(ar, CARL9170_CMD_ECHO,
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4, (u8 *)&v,
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4, (u8 *)&echores);
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if (err)
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return err;
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if (v != echores) {
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wiphy_info(ar->hw->wiphy, "wrong echo %x != %x", v, echores);
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return -EINVAL;
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}
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return 0;
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}
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struct carl9170_cmd *carl9170_cmd_buf(struct ar9170 *ar,
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const enum carl9170_cmd_oids cmd, const unsigned int len)
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{
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struct carl9170_cmd *tmp;
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2023-10-24 12:59:35 +02:00
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tmp = kzalloc(sizeof(*tmp), GFP_ATOMIC);
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2023-08-30 17:31:07 +02:00
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if (tmp) {
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tmp->hdr.cmd = cmd;
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tmp->hdr.len = len;
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}
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return tmp;
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}
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int carl9170_reboot(struct ar9170 *ar)
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{
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struct carl9170_cmd *cmd;
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int err;
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cmd = carl9170_cmd_buf(ar, CARL9170_CMD_REBOOT_ASYNC, 0);
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if (!cmd)
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return -ENOMEM;
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err = __carl9170_exec_cmd(ar, cmd, true);
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return err;
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}
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int carl9170_mac_reset(struct ar9170 *ar)
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{
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return carl9170_exec_cmd(ar, CARL9170_CMD_SWRST,
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0, NULL, 0, NULL);
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}
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int carl9170_bcn_ctrl(struct ar9170 *ar, const unsigned int vif_id,
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const u32 mode, const u32 addr, const u32 len)
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{
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struct carl9170_cmd *cmd;
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cmd = carl9170_cmd_buf(ar, CARL9170_CMD_BCN_CTRL_ASYNC,
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sizeof(struct carl9170_bcn_ctrl_cmd));
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if (!cmd)
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return -ENOMEM;
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cmd->bcn_ctrl.vif_id = cpu_to_le32(vif_id);
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cmd->bcn_ctrl.mode = cpu_to_le32(mode);
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cmd->bcn_ctrl.bcn_addr = cpu_to_le32(addr);
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cmd->bcn_ctrl.bcn_len = cpu_to_le32(len);
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return __carl9170_exec_cmd(ar, cmd, true);
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}
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int carl9170_collect_tally(struct ar9170 *ar)
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{
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struct carl9170_tally_rsp tally;
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struct survey_info *info;
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unsigned int tick;
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int err;
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err = carl9170_exec_cmd(ar, CARL9170_CMD_TALLY, 0, NULL,
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sizeof(tally), (u8 *)&tally);
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if (err)
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return err;
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tick = le32_to_cpu(tally.tick);
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if (tick) {
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ar->tally.active += le32_to_cpu(tally.active) / tick;
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ar->tally.cca += le32_to_cpu(tally.cca) / tick;
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ar->tally.tx_time += le32_to_cpu(tally.tx_time) / tick;
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ar->tally.rx_total += le32_to_cpu(tally.rx_total);
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ar->tally.rx_overrun += le32_to_cpu(tally.rx_overrun);
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if (ar->channel) {
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info = &ar->survey[ar->channel->hw_value];
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info->time = ar->tally.active;
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info->time_busy = ar->tally.cca;
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info->time_tx = ar->tally.tx_time;
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do_div(info->time, 1000);
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do_div(info->time_busy, 1000);
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do_div(info->time_tx, 1000);
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}
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}
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return 0;
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}
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int carl9170_powersave(struct ar9170 *ar, const bool ps)
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{
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struct carl9170_cmd *cmd;
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u32 state;
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cmd = carl9170_cmd_buf(ar, CARL9170_CMD_PSM_ASYNC,
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sizeof(struct carl9170_psm));
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if (!cmd)
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return -ENOMEM;
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if (ps) {
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/* Sleep until next TBTT */
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state = CARL9170_PSM_SLEEP | 1;
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} else {
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/* wake up immediately */
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state = 1;
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}
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cmd->psm.state = cpu_to_le32(state);
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return __carl9170_exec_cmd(ar, cmd, true);
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}
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