350 lines
8.9 KiB
C
350 lines
8.9 KiB
C
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// SPDX-License-Identifier: ISC
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/*
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* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
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* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
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*/
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#include "mt76x2.h"
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#include "eeprom.h"
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#include "mcu.h"
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#include "../mt76x02_phy.h"
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static void
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mt76x2_adjust_high_lna_gain(struct mt76x02_dev *dev, int reg, s8 offset)
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{
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s8 gain;
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gain = FIELD_GET(MT_BBP_AGC_LNA_HIGH_GAIN,
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mt76_rr(dev, MT_BBP(AGC, reg)));
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gain -= offset / 2;
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mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_LNA_HIGH_GAIN, gain);
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}
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static void
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mt76x2_adjust_agc_gain(struct mt76x02_dev *dev, int reg, s8 offset)
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{
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s8 gain;
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gain = FIELD_GET(MT_BBP_AGC_GAIN, mt76_rr(dev, MT_BBP(AGC, reg)));
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gain += offset;
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mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_GAIN, gain);
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}
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void mt76x2_apply_gain_adj(struct mt76x02_dev *dev)
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{
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s8 *gain_adj = dev->cal.rx.high_gain;
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mt76x2_adjust_high_lna_gain(dev, 4, gain_adj[0]);
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mt76x2_adjust_high_lna_gain(dev, 5, gain_adj[1]);
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mt76x2_adjust_agc_gain(dev, 8, gain_adj[0]);
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mt76x2_adjust_agc_gain(dev, 9, gain_adj[1]);
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}
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EXPORT_SYMBOL_GPL(mt76x2_apply_gain_adj);
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void mt76x2_phy_set_txpower_regs(struct mt76x02_dev *dev,
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enum nl80211_band band)
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{
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u32 pa_mode[2];
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u32 pa_mode_adj;
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if (band == NL80211_BAND_2GHZ) {
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pa_mode[0] = 0x010055ff;
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pa_mode[1] = 0x00550055;
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mt76_wr(dev, MT_TX_ALC_CFG_2, 0x35160a00);
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mt76_wr(dev, MT_TX_ALC_CFG_3, 0x35160a06);
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if (mt76x02_ext_pa_enabled(dev, band)) {
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mt76_wr(dev, MT_RF_PA_MODE_ADJ0, 0x0000ec00);
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mt76_wr(dev, MT_RF_PA_MODE_ADJ1, 0x0000ec00);
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} else {
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mt76_wr(dev, MT_RF_PA_MODE_ADJ0, 0xf4000200);
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mt76_wr(dev, MT_RF_PA_MODE_ADJ1, 0xfa000200);
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}
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} else {
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pa_mode[0] = 0x0000ffff;
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pa_mode[1] = 0x00ff00ff;
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if (mt76x02_ext_pa_enabled(dev, band)) {
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mt76_wr(dev, MT_TX_ALC_CFG_2, 0x2f0f0400);
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mt76_wr(dev, MT_TX_ALC_CFG_3, 0x2f0f0476);
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} else {
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mt76_wr(dev, MT_TX_ALC_CFG_2, 0x1b0f0400);
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mt76_wr(dev, MT_TX_ALC_CFG_3, 0x1b0f0476);
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}
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if (mt76x02_ext_pa_enabled(dev, band))
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pa_mode_adj = 0x04000000;
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else
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pa_mode_adj = 0;
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mt76_wr(dev, MT_RF_PA_MODE_ADJ0, pa_mode_adj);
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mt76_wr(dev, MT_RF_PA_MODE_ADJ1, pa_mode_adj);
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}
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mt76_wr(dev, MT_BB_PA_MODE_CFG0, pa_mode[0]);
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mt76_wr(dev, MT_BB_PA_MODE_CFG1, pa_mode[1]);
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mt76_wr(dev, MT_RF_PA_MODE_CFG0, pa_mode[0]);
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mt76_wr(dev, MT_RF_PA_MODE_CFG1, pa_mode[1]);
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if (mt76x02_ext_pa_enabled(dev, band)) {
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u32 val;
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if (band == NL80211_BAND_2GHZ)
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val = 0x3c3c023c;
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else
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val = 0x363c023c;
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mt76_wr(dev, MT_TX0_RF_GAIN_CORR, val);
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mt76_wr(dev, MT_TX1_RF_GAIN_CORR, val);
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mt76_wr(dev, MT_TX_ALC_CFG_4, 0x00001818);
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} else {
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if (band == NL80211_BAND_2GHZ) {
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u32 val = 0x0f3c3c3c;
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mt76_wr(dev, MT_TX0_RF_GAIN_CORR, val);
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mt76_wr(dev, MT_TX1_RF_GAIN_CORR, val);
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mt76_wr(dev, MT_TX_ALC_CFG_4, 0x00000606);
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} else {
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mt76_wr(dev, MT_TX0_RF_GAIN_CORR, 0x383c023c);
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mt76_wr(dev, MT_TX1_RF_GAIN_CORR, 0x24282e28);
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mt76_wr(dev, MT_TX_ALC_CFG_4, 0);
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}
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}
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}
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EXPORT_SYMBOL_GPL(mt76x2_phy_set_txpower_regs);
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static int
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mt76x2_get_min_rate_power(struct mt76x02_rate_power *r)
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{
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int i;
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s8 ret = 0;
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for (i = 0; i < sizeof(r->all); i++) {
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if (!r->all[i])
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continue;
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if (ret)
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ret = min(ret, r->all[i]);
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else
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ret = r->all[i];
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}
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return ret;
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}
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void mt76x2_phy_set_txpower(struct mt76x02_dev *dev)
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{
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enum nl80211_chan_width width = dev->mphy.chandef.width;
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struct ieee80211_channel *chan = dev->mphy.chandef.chan;
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struct mt76x2_tx_power_info txp;
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int txp_0, txp_1, delta = 0;
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struct mt76x02_rate_power t = {};
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int base_power, gain;
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mt76x2_get_power_info(dev, &txp, chan);
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if (width == NL80211_CHAN_WIDTH_40)
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delta = txp.delta_bw40;
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else if (width == NL80211_CHAN_WIDTH_80)
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delta = txp.delta_bw80;
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mt76x2_get_rate_power(dev, &t, chan);
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mt76x02_add_rate_power_offset(&t, txp.target_power + delta);
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mt76x02_limit_rate_power(&t, dev->txpower_conf);
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dev->mphy.txpower_cur = mt76x02_get_max_rate_power(&t);
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base_power = mt76x2_get_min_rate_power(&t);
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delta = base_power - txp.target_power;
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txp_0 = txp.chain[0].target_power + txp.chain[0].delta + delta;
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txp_1 = txp.chain[1].target_power + txp.chain[1].delta + delta;
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gain = min(txp_0, txp_1);
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if (gain < 0) {
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base_power -= gain;
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txp_0 -= gain;
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txp_1 -= gain;
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} else if (gain > 0x2f) {
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base_power -= gain - 0x2f;
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txp_0 = 0x2f;
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txp_1 = 0x2f;
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}
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mt76x02_add_rate_power_offset(&t, -base_power);
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dev->target_power = txp.target_power;
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dev->target_power_delta[0] = txp_0 - txp.chain[0].target_power;
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dev->target_power_delta[1] = txp_1 - txp.chain[0].target_power;
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dev->rate_power = t;
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mt76x02_phy_set_txpower(dev, txp_0, txp_1);
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}
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EXPORT_SYMBOL_GPL(mt76x2_phy_set_txpower);
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void mt76x2_configure_tx_delay(struct mt76x02_dev *dev,
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enum nl80211_band band, u8 bw)
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{
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u32 cfg0, cfg1;
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if (mt76x02_ext_pa_enabled(dev, band)) {
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cfg0 = bw ? 0x000b0c01 : 0x00101101;
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cfg1 = 0x00011414;
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} else {
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cfg0 = bw ? 0x000b0b01 : 0x00101001;
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cfg1 = 0x00021414;
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}
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mt76_wr(dev, MT_TX_SW_CFG0, cfg0);
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mt76_wr(dev, MT_TX_SW_CFG1, cfg1);
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mt76_rmw_field(dev, MT_XIFS_TIME_CFG, MT_XIFS_TIME_CFG_OFDM_SIFS, 15);
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}
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EXPORT_SYMBOL_GPL(mt76x2_configure_tx_delay);
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void mt76x2_phy_tssi_compensate(struct mt76x02_dev *dev)
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{
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struct ieee80211_channel *chan = dev->mphy.chandef.chan;
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struct mt76x2_tx_power_info txp;
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struct mt76x2_tssi_comp t = {};
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if (!dev->cal.tssi_cal_done)
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return;
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if (!dev->cal.tssi_comp_pending) {
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/* TSSI trigger */
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t.cal_mode = BIT(0);
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mt76x2_mcu_tssi_comp(dev, &t);
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dev->cal.tssi_comp_pending = true;
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} else {
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if (mt76_rr(dev, MT_BBP(CORE, 34)) & BIT(4))
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return;
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dev->cal.tssi_comp_pending = false;
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mt76x2_get_power_info(dev, &txp, chan);
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if (mt76x02_ext_pa_enabled(dev, chan->band))
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t.pa_mode = 1;
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t.cal_mode = BIT(1);
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t.slope0 = txp.chain[0].tssi_slope;
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t.offset0 = txp.chain[0].tssi_offset;
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t.slope1 = txp.chain[1].tssi_slope;
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t.offset1 = txp.chain[1].tssi_offset;
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mt76x2_mcu_tssi_comp(dev, &t);
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if (t.pa_mode || dev->cal.dpd_cal_done || dev->ed_tx_blocked)
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return;
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usleep_range(10000, 20000);
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mt76x02_mcu_calibrate(dev, MCU_CAL_DPD, chan->hw_value);
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dev->cal.dpd_cal_done = true;
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}
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}
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EXPORT_SYMBOL_GPL(mt76x2_phy_tssi_compensate);
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static void
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mt76x2_phy_set_gain_val(struct mt76x02_dev *dev)
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{
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u32 val;
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u8 gain_val[2];
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gain_val[0] = dev->cal.agc_gain_cur[0] - dev->cal.agc_gain_adjust;
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gain_val[1] = dev->cal.agc_gain_cur[1] - dev->cal.agc_gain_adjust;
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val = 0x1836 << 16;
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if (!mt76x2_has_ext_lna(dev) &&
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dev->mphy.chandef.width >= NL80211_CHAN_WIDTH_40)
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val = 0x1e42 << 16;
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if (mt76x2_has_ext_lna(dev) &&
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dev->mphy.chandef.chan->band == NL80211_BAND_2GHZ &&
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dev->mphy.chandef.width < NL80211_CHAN_WIDTH_40)
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val = 0x0f36 << 16;
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val |= 0xf8;
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mt76_wr(dev, MT_BBP(AGC, 8),
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val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[0]));
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mt76_wr(dev, MT_BBP(AGC, 9),
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val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[1]));
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if (dev->mphy.chandef.chan->flags & IEEE80211_CHAN_RADAR)
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mt76x02_phy_dfs_adjust_agc(dev);
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}
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void mt76x2_phy_update_channel_gain(struct mt76x02_dev *dev)
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{
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u8 *gain = dev->cal.agc_gain_init;
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u8 low_gain_delta, gain_delta;
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u32 agc_35, agc_37;
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bool gain_change;
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int low_gain;
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u32 val;
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dev->cal.avg_rssi_all = mt76_get_min_avg_rssi(&dev->mt76, false);
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if (!dev->cal.avg_rssi_all)
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dev->cal.avg_rssi_all = -75;
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low_gain = (dev->cal.avg_rssi_all > mt76x02_get_rssi_gain_thresh(dev)) +
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(dev->cal.avg_rssi_all > mt76x02_get_low_rssi_gain_thresh(dev));
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gain_change = dev->cal.low_gain < 0 ||
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(dev->cal.low_gain & 2) ^ (low_gain & 2);
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dev->cal.low_gain = low_gain;
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if (!gain_change) {
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if (mt76x02_phy_adjust_vga_gain(dev))
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mt76x2_phy_set_gain_val(dev);
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return;
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}
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if (dev->mphy.chandef.width == NL80211_CHAN_WIDTH_80) {
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mt76_wr(dev, MT_BBP(RXO, 14), 0x00560211);
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val = mt76_rr(dev, MT_BBP(AGC, 26)) & ~0xf;
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if (low_gain == 2)
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val |= 0x3;
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else
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val |= 0x5;
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mt76_wr(dev, MT_BBP(AGC, 26), val);
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} else {
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mt76_wr(dev, MT_BBP(RXO, 14), 0x00560423);
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}
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if (mt76x2_has_ext_lna(dev))
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low_gain_delta = 10;
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else
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low_gain_delta = 14;
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agc_37 = 0x2121262c;
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if (dev->mphy.chandef.chan->band == NL80211_BAND_2GHZ)
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agc_35 = 0x11111516;
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else if (low_gain == 2)
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agc_35 = agc_37 = 0x08080808;
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else if (dev->mphy.chandef.width == NL80211_CHAN_WIDTH_80)
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agc_35 = 0x10101014;
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else
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agc_35 = 0x11111116;
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if (low_gain == 2) {
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|
mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a990);
|
||
|
|
mt76_wr(dev, MT_BBP(AGC, 35), 0x08080808);
|
||
|
|
mt76_wr(dev, MT_BBP(AGC, 37), 0x08080808);
|
||
|
|
gain_delta = low_gain_delta;
|
||
|
|
dev->cal.agc_gain_adjust = 0;
|
||
|
|
} else {
|
||
|
|
mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a991);
|
||
|
|
gain_delta = 0;
|
||
|
|
dev->cal.agc_gain_adjust = low_gain_delta;
|
||
|
|
}
|
||
|
|
|
||
|
|
mt76_wr(dev, MT_BBP(AGC, 35), agc_35);
|
||
|
|
mt76_wr(dev, MT_BBP(AGC, 37), agc_37);
|
||
|
|
|
||
|
|
dev->cal.agc_gain_cur[0] = gain[0] - gain_delta;
|
||
|
|
dev->cal.agc_gain_cur[1] = gain[1] - gain_delta;
|
||
|
|
mt76x2_phy_set_gain_val(dev);
|
||
|
|
|
||
|
|
/* clear false CCA counters */
|
||
|
|
mt76_rr(dev, MT_RX_STAT_1);
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(mt76x2_phy_update_channel_gain);
|