2023-08-30 17:31:07 +02:00
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2009-2012 Realtek Corporation.*/
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#include "../wifi.h"
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#include "../pci.h"
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#include "../base.h"
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#include "../stats.h"
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#include "reg.h"
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#include "def.h"
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#include "phy.h"
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#include "trx.h"
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#include "led.h"
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static u8 _rtl92ce_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
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{
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__le16 fc = rtl_get_fc(skb);
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if (unlikely(ieee80211_is_beacon(fc)))
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return QSLT_BEACON;
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if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
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return QSLT_MGNT;
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return skb->priority;
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}
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static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
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struct rtl_stats *pstats,
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struct rx_desc_92c *pdesc,
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struct rx_fwinfo_92c *p_drvinfo,
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bool packet_match_bssid,
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bool packet_toself,
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bool packet_beacon)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct phy_sts_cck_8192s_t *cck_buf;
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struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
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s8 rx_pwr_all = 0, rx_pwr[4];
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u8 evm, pwdb_all, rf_rx_num = 0;
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u8 i, max_spatial_stream;
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u32 rssi, total_rssi = 0;
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bool is_cck_rate;
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is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc->rxmcs);
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pstats->packet_matchbssid = packet_match_bssid;
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pstats->packet_toself = packet_toself;
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pstats->is_cck = is_cck_rate;
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pstats->packet_beacon = packet_beacon;
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pstats->rx_mimo_sig_qual[0] = -1;
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pstats->rx_mimo_sig_qual[1] = -1;
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if (is_cck_rate) {
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u8 report, cck_highpwr;
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cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
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if (ppsc->rfpwr_state == ERFON)
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cck_highpwr = (u8) rtl_get_bbreg(hw,
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RFPGA0_XA_HSSIPARAMETER2,
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BIT(9));
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else
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cck_highpwr = false;
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if (!cck_highpwr) {
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u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
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report = cck_buf->cck_agc_rpt & 0xc0;
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report = report >> 6;
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switch (report) {
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case 0x3:
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rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
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break;
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case 0x2:
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rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
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break;
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case 0x1:
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rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
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break;
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case 0x0:
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rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
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break;
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}
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} else {
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u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
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report = p_drvinfo->cfosho[0] & 0x60;
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report = report >> 5;
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switch (report) {
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case 0x3:
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rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
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break;
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case 0x2:
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rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
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break;
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case 0x1:
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rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
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break;
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case 0x0:
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rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
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break;
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}
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}
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pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
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/* CCK gain is smaller than OFDM/MCS gain,
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* so we add gain diff by experiences,
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* the val is 6
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*/
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pwdb_all += 6;
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if (pwdb_all > 100)
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pwdb_all = 100;
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/* modify the offset to make the same
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* gain index with OFDM.
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*/
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if (pwdb_all > 34 && pwdb_all <= 42)
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pwdb_all -= 2;
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else if (pwdb_all > 26 && pwdb_all <= 34)
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pwdb_all -= 6;
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else if (pwdb_all > 14 && pwdb_all <= 26)
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pwdb_all -= 8;
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else if (pwdb_all > 4 && pwdb_all <= 14)
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pwdb_all -= 4;
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pstats->rx_pwdb_all = pwdb_all;
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pstats->recvsignalpower = rx_pwr_all;
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/* (3) Get Signal Quality (EVM) */
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if (packet_match_bssid) {
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u8 sq;
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if (pstats->rx_pwdb_all > 40)
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sq = 100;
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else {
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sq = cck_buf->sq_rpt;
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if (sq > 64)
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sq = 0;
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else if (sq < 20)
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sq = 100;
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else
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sq = ((64 - sq) * 100) / 44;
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}
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pstats->signalquality = sq;
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pstats->rx_mimo_sig_qual[0] = sq;
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pstats->rx_mimo_sig_qual[1] = -1;
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}
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} else {
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rtlpriv->dm.rfpath_rxenable[0] =
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rtlpriv->dm.rfpath_rxenable[1] = true;
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/* (1)Get RSSI for HT rate */
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for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
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/* we will judge RF RX path now. */
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if (rtlpriv->dm.rfpath_rxenable[i])
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rf_rx_num++;
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rx_pwr[i] =
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((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
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/* Translate DBM to percentage. */
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rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
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total_rssi += rssi;
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/* Get Rx snr value in DB */
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rtlpriv->stats.rx_snr_db[i] =
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(long)(p_drvinfo->rxsnr[i] / 2);
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/* Record Signal Strength for next packet */
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if (packet_match_bssid)
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pstats->rx_mimo_signalstrength[i] = (u8) rssi;
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}
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/* (2)PWDB, Average PWDB calculated by
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* hardware (for rate adaptive)
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*/
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rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
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pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
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pstats->rx_pwdb_all = pwdb_all;
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pstats->rxpower = rx_pwr_all;
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pstats->recvsignalpower = rx_pwr_all;
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/* (3)EVM of HT rate */
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if (pstats->is_ht && pstats->rate >= DESC_RATEMCS8 &&
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pstats->rate <= DESC_RATEMCS15)
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max_spatial_stream = 2;
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else
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max_spatial_stream = 1;
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for (i = 0; i < max_spatial_stream; i++) {
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evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
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if (packet_match_bssid) {
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/* Fill value in RFD, Get the first
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* spatial stream only
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*/
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if (i == 0)
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pstats->signalquality =
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(u8)(evm & 0xff);
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pstats->rx_mimo_sig_qual[i] = (u8)(evm & 0xff);
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}
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}
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}
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/* UI BSS List signal strength(in percentage),
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* make it good looking, from 0~100.
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*/
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if (is_cck_rate)
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pstats->signalstrength =
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(u8)(rtl_signal_scale_mapping(hw, pwdb_all));
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else if (rf_rx_num != 0)
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pstats->signalstrength =
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(u8)(rtl_signal_scale_mapping(hw, total_rssi /= rf_rx_num));
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}
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static void _rtl92ce_translate_rx_signal_stuff(struct ieee80211_hw *hw,
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struct sk_buff *skb,
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struct rtl_stats *pstats,
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struct rx_desc_92c *pdesc,
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struct rx_fwinfo_92c *p_drvinfo)
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{
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struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
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struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
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struct ieee80211_hdr *hdr;
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u8 *tmp_buf;
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u8 *praddr;
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__le16 fc;
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u16 type, c_fc;
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bool packet_matchbssid, packet_toself, packet_beacon = false;
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tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
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hdr = (struct ieee80211_hdr *)tmp_buf;
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fc = hdr->frame_control;
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c_fc = le16_to_cpu(fc);
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type = WLAN_FC_GET_TYPE(fc);
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praddr = hdr->addr1;
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packet_matchbssid =
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((IEEE80211_FTYPE_CTL != type) &&
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ether_addr_equal(mac->bssid,
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(c_fc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
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(c_fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
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hdr->addr3) &&
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(!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
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packet_toself = packet_matchbssid &&
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ether_addr_equal(praddr, rtlefuse->dev_addr);
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if (ieee80211_is_beacon(fc))
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packet_beacon = true;
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_rtl92ce_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
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packet_matchbssid, packet_toself,
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packet_beacon);
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rtl_process_phyinfo(hw, tmp_buf, pstats);
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}
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bool rtl92ce_rx_query_desc(struct ieee80211_hw *hw,
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struct rtl_stats *stats,
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struct ieee80211_rx_status *rx_status,
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u8 *p_desc8, struct sk_buff *skb)
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{
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struct rx_fwinfo_92c *p_drvinfo;
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struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc8;
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struct ieee80211_hdr *hdr;
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__le32 *p_desc = (__le32 *)p_desc8;
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u32 phystatus = get_rx_desc_physt(p_desc);
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stats->length = (u16)get_rx_desc_pkt_len(p_desc);
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stats->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(p_desc) *
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RX_DRV_INFO_SIZE_UNIT;
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stats->rx_bufshift = (u8)(get_rx_desc_shift(p_desc) & 0x03);
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stats->icv = (u16)get_rx_desc_icv(p_desc);
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stats->crc = (u16)get_rx_desc_crc32(p_desc);
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stats->hwerror = (stats->crc | stats->icv);
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stats->decrypted = !get_rx_desc_swdec(p_desc);
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stats->rate = (u8)get_rx_desc_rxmcs(p_desc);
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stats->shortpreamble = (u16)get_rx_desc_splcp(p_desc);
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stats->isampdu = (bool)(get_rx_desc_paggr(p_desc) == 1);
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stats->isfirst_ampdu = (bool)((get_rx_desc_paggr(p_desc) == 1) &&
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(get_rx_desc_faggr(p_desc) == 1));
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stats->timestamp_low = get_rx_desc_tsfl(p_desc);
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stats->rx_is40mhzpacket = (bool)get_rx_desc_bw(p_desc);
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stats->is_ht = (bool)get_rx_desc_rxht(p_desc);
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stats->is_cck = RX_HAL_IS_CCK_RATE(pdesc->rxmcs);
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rx_status->freq = hw->conf.chandef.chan->center_freq;
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rx_status->band = hw->conf.chandef.chan->band;
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hdr = (struct ieee80211_hdr *)(skb->data + stats->rx_drvinfo_size
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+ stats->rx_bufshift);
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if (stats->crc)
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rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
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if (stats->rx_is40mhzpacket)
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rx_status->bw = RATE_INFO_BW_40;
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if (stats->is_ht)
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rx_status->encoding = RX_ENC_HT;
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rx_status->flag |= RX_FLAG_MACTIME_START;
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/* hw will set stats->decrypted true, if it finds the
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* frame is open data frame or mgmt frame.
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* So hw will not decryption robust managment frame
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* for IEEE80211w but still set status->decrypted
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* true, so here we should set it back to undecrypted
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* for IEEE80211w frame, and mac80211 sw will help
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* to decrypt it
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*/
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if (stats->decrypted) {
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if ((_ieee80211_is_robust_mgmt_frame(hdr)) &&
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(ieee80211_has_protected(hdr->frame_control)))
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rx_status->flag &= ~RX_FLAG_DECRYPTED;
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else
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rx_status->flag |= RX_FLAG_DECRYPTED;
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}
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/* rate_idx: index of data rate into band's
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* supported rates or MCS index if HT rates
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* are use (RX_FLAG_HT)
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* Notice: this is diff with windows define
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*/
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rx_status->rate_idx = rtlwifi_rate_mapping(hw, stats->is_ht,
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false, stats->rate);
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rx_status->mactime = stats->timestamp_low;
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if (phystatus) {
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p_drvinfo = (struct rx_fwinfo_92c *)(skb->data +
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stats->rx_bufshift);
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_rtl92ce_translate_rx_signal_stuff(hw,
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skb, stats, pdesc,
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p_drvinfo);
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}
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/*rx_status->qual = stats->signal; */
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rx_status->signal = stats->recvsignalpower + 10;
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return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
|
|
|
|
struct ieee80211_hdr *hdr, u8 *pdesc8,
|
|
|
|
u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
|
|
|
|
struct ieee80211_sta *sta,
|
|
|
|
struct sk_buff *skb,
|
|
|
|
u8 hw_queue, struct rtl_tcb_desc *tcb_desc)
|
|
|
|
{
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
|
|
|
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
|
|
|
|
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
|
|
|
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
|
|
|
|
bool defaultadapter = true;
|
|
|
|
__le32 *pdesc = (__le32 *)pdesc8;
|
|
|
|
u16 seq_number;
|
|
|
|
__le16 fc = hdr->frame_control;
|
|
|
|
u8 fw_qsel = _rtl92ce_map_hwqueue_to_fwqueue(skb, hw_queue);
|
|
|
|
bool firstseg = ((hdr->seq_ctrl &
|
|
|
|
cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
|
|
|
|
|
|
|
|
bool lastseg = ((hdr->frame_control &
|
|
|
|
cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
|
|
|
|
|
|
|
|
dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
|
|
|
|
skb->len, DMA_TO_DEVICE);
|
|
|
|
|
|
|
|
u8 bw_40 = 0;
|
|
|
|
|
|
|
|
if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
|
|
|
|
rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
|
|
|
|
"DMA mapping error\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
rcu_read_lock();
|
|
|
|
sta = get_sta(hw, mac->vif, mac->bssid);
|
|
|
|
if (mac->opmode == NL80211_IFTYPE_STATION) {
|
|
|
|
bw_40 = mac->bw_40;
|
|
|
|
} else if (mac->opmode == NL80211_IFTYPE_AP ||
|
|
|
|
mac->opmode == NL80211_IFTYPE_ADHOC ||
|
|
|
|
mac->opmode == NL80211_IFTYPE_MESH_POINT) {
|
|
|
|
if (sta)
|
|
|
|
bw_40 = sta->deflink.bandwidth >= IEEE80211_STA_RX_BW_40;
|
|
|
|
}
|
|
|
|
|
|
|
|
seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
|
|
|
|
|
|
|
|
rtl_get_tcb_desc(hw, info, sta, skb, tcb_desc);
|
|
|
|
|
|
|
|
clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_92c));
|
|
|
|
|
|
|
|
if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
|
|
|
|
firstseg = true;
|
|
|
|
lastseg = true;
|
|
|
|
}
|
|
|
|
if (firstseg) {
|
|
|
|
set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
|
|
|
|
|
|
|
|
set_tx_desc_tx_rate(pdesc, tcb_desc->hw_rate);
|
|
|
|
|
|
|
|
if (tcb_desc->use_shortgi || tcb_desc->use_shortpreamble)
|
|
|
|
set_tx_desc_data_shortgi(pdesc, 1);
|
|
|
|
|
|
|
|
if (info->flags & IEEE80211_TX_CTL_AMPDU) {
|
|
|
|
set_tx_desc_agg_break(pdesc, 1);
|
|
|
|
set_tx_desc_max_agg_num(pdesc, 0x14);
|
|
|
|
}
|
|
|
|
set_tx_desc_seq(pdesc, seq_number);
|
|
|
|
|
|
|
|
set_tx_desc_rts_enable(pdesc, ((tcb_desc->rts_enable &&
|
|
|
|
!tcb_desc->
|
|
|
|
cts_enable) ? 1 : 0));
|
|
|
|
set_tx_desc_hw_rts_enable(pdesc,
|
|
|
|
((tcb_desc->rts_enable
|
|
|
|
|| tcb_desc->cts_enable) ? 1 : 0));
|
|
|
|
set_tx_desc_cts2self(pdesc, ((tcb_desc->cts_enable) ? 1 : 0));
|
|
|
|
set_tx_desc_rts_stbc(pdesc, ((tcb_desc->rts_stbc) ? 1 : 0));
|
|
|
|
|
|
|
|
set_tx_desc_rts_rate(pdesc, tcb_desc->rts_rate);
|
|
|
|
set_tx_desc_rts_bw(pdesc, 0);
|
|
|
|
set_tx_desc_rts_sc(pdesc, tcb_desc->rts_sc);
|
|
|
|
set_tx_desc_rts_short(pdesc,
|
|
|
|
((tcb_desc->rts_rate <= DESC_RATE54M) ?
|
|
|
|
(tcb_desc->rts_use_shortpreamble ? 1 : 0)
|
|
|
|
: (tcb_desc->rts_use_shortgi ? 1 : 0)));
|
|
|
|
|
|
|
|
if (bw_40) {
|
|
|
|
if (tcb_desc->packet_bw) {
|
|
|
|
set_tx_desc_data_bw(pdesc, 1);
|
|
|
|
set_tx_desc_tx_sub_carrier(pdesc, 3);
|
|
|
|
} else {
|
|
|
|
set_tx_desc_data_bw(pdesc, 0);
|
|
|
|
set_tx_desc_tx_sub_carrier(pdesc,
|
|
|
|
mac->cur_40_prime_sc);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
set_tx_desc_data_bw(pdesc, 0);
|
|
|
|
set_tx_desc_tx_sub_carrier(pdesc, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
set_tx_desc_linip(pdesc, 0);
|
|
|
|
set_tx_desc_pkt_size(pdesc, (u16)skb->len);
|
|
|
|
|
|
|
|
if (sta) {
|
|
|
|
u8 ampdu_density = sta->deflink.ht_cap.ampdu_density;
|
|
|
|
|
|
|
|
set_tx_desc_ampdu_density(pdesc, ampdu_density);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (info->control.hw_key) {
|
|
|
|
struct ieee80211_key_conf *keyconf =
|
|
|
|
info->control.hw_key;
|
|
|
|
|
|
|
|
switch (keyconf->cipher) {
|
|
|
|
case WLAN_CIPHER_SUITE_WEP40:
|
|
|
|
case WLAN_CIPHER_SUITE_WEP104:
|
|
|
|
case WLAN_CIPHER_SUITE_TKIP:
|
|
|
|
set_tx_desc_sec_type(pdesc, 0x1);
|
|
|
|
break;
|
|
|
|
case WLAN_CIPHER_SUITE_CCMP:
|
|
|
|
set_tx_desc_sec_type(pdesc, 0x3);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
set_tx_desc_sec_type(pdesc, 0x0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
set_tx_desc_pkt_id(pdesc, 0);
|
|
|
|
set_tx_desc_queue_sel(pdesc, fw_qsel);
|
|
|
|
|
|
|
|
set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
|
|
|
|
set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
|
|
|
|
set_tx_desc_disable_fb(pdesc, 0);
|
|
|
|
set_tx_desc_use_rate(pdesc, tcb_desc->use_driver_rate ? 1 : 0);
|
|
|
|
|
|
|
|
if (ieee80211_is_data_qos(fc)) {
|
|
|
|
if (mac->rdg_en) {
|
|
|
|
rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
|
|
|
|
"Enable RDG function\n");
|
|
|
|
set_tx_desc_rdg_enable(pdesc, 1);
|
|
|
|
set_tx_desc_htc(pdesc, 1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
rcu_read_unlock();
|
|
|
|
|
|
|
|
set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
|
|
|
|
set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
|
|
|
|
|
|
|
|
set_tx_desc_tx_buffer_size(pdesc, (u16)skb->len);
|
|
|
|
|
|
|
|
set_tx_desc_tx_buffer_address(pdesc, mapping);
|
|
|
|
|
|
|
|
if (rtlpriv->dm.useramask) {
|
|
|
|
set_tx_desc_rate_id(pdesc, tcb_desc->ratr_index);
|
|
|
|
set_tx_desc_macid(pdesc, tcb_desc->mac_id);
|
|
|
|
} else {
|
|
|
|
set_tx_desc_rate_id(pdesc, 0xC + tcb_desc->ratr_index);
|
|
|
|
set_tx_desc_macid(pdesc, tcb_desc->ratr_index);
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((!ieee80211_is_data_qos(fc)) && ppsc->fwctrl_lps) {
|
|
|
|
set_tx_desc_hwseq_en(pdesc, 1);
|
|
|
|
set_tx_desc_pkt_id(pdesc, 8);
|
|
|
|
|
|
|
|
if (!defaultadapter)
|
|
|
|
set_tx_desc_qos(pdesc, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
|
|
|
|
|
|
|
|
if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
|
|
|
|
is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
|
|
|
|
set_tx_desc_bmc(pdesc, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw,
|
|
|
|
u8 *pdesc8, bool firstseg,
|
|
|
|
bool lastseg, struct sk_buff *skb)
|
|
|
|
{
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
|
|
|
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
|
|
|
u8 fw_queue = QSLT_BEACON;
|
|
|
|
__le32 *pdesc = (__le32 *)pdesc8;
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
|
2023-08-30 17:31:07 +02:00
|
|
|
__le16 fc = hdr->frame_control;
|
|
|
|
|
|
|
|
dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
|
|
|
|
skb->len, DMA_TO_DEVICE);
|
|
|
|
|
|
|
|
if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
|
|
|
|
rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
|
|
|
|
"DMA mapping error\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);
|
|
|
|
|
|
|
|
if (firstseg)
|
|
|
|
set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
|
|
|
|
|
|
|
|
set_tx_desc_tx_rate(pdesc, DESC_RATE1M);
|
|
|
|
|
|
|
|
set_tx_desc_seq(pdesc, 0);
|
|
|
|
|
|
|
|
set_tx_desc_linip(pdesc, 0);
|
|
|
|
|
|
|
|
set_tx_desc_queue_sel(pdesc, fw_queue);
|
|
|
|
|
|
|
|
set_tx_desc_first_seg(pdesc, 1);
|
|
|
|
set_tx_desc_last_seg(pdesc, 1);
|
|
|
|
|
|
|
|
set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
|
|
|
|
|
|
|
|
set_tx_desc_tx_buffer_address(pdesc, mapping);
|
|
|
|
|
|
|
|
set_tx_desc_rate_id(pdesc, 7);
|
|
|
|
set_tx_desc_macid(pdesc, 0);
|
|
|
|
|
|
|
|
set_tx_desc_own(pdesc, 1);
|
|
|
|
|
|
|
|
set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
|
|
|
|
|
|
|
|
set_tx_desc_first_seg(pdesc, 1);
|
|
|
|
set_tx_desc_last_seg(pdesc, 1);
|
|
|
|
|
|
|
|
set_tx_desc_offset(pdesc, 0x20);
|
|
|
|
|
|
|
|
set_tx_desc_use_rate(pdesc, 1);
|
|
|
|
|
|
|
|
if (!ieee80211_is_data_qos(fc)) {
|
|
|
|
set_tx_desc_hwseq_en(pdesc, 1);
|
|
|
|
set_tx_desc_pkt_id(pdesc, 8);
|
|
|
|
}
|
|
|
|
|
|
|
|
RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
|
"H2C Tx Cmd Content", pdesc, TX_DESC_SIZE);
|
|
|
|
}
|
|
|
|
|
|
|
|
void rtl92ce_set_desc(struct ieee80211_hw *hw, u8 *pdesc8, bool istx,
|
|
|
|
u8 desc_name, u8 *val)
|
|
|
|
{
|
|
|
|
__le32 *pdesc = (__le32 *)pdesc8;
|
|
|
|
|
|
|
|
if (istx) {
|
|
|
|
switch (desc_name) {
|
|
|
|
case HW_DESC_OWN:
|
|
|
|
wmb();
|
|
|
|
set_tx_desc_own(pdesc, 1);
|
|
|
|
break;
|
|
|
|
case HW_DESC_TX_NEXTDESC_ADDR:
|
|
|
|
set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n",
|
|
|
|
desc_name);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
switch (desc_name) {
|
|
|
|
case HW_DESC_RXOWN:
|
|
|
|
wmb();
|
|
|
|
set_rx_desc_own(pdesc, 1);
|
|
|
|
break;
|
|
|
|
case HW_DESC_RXBUFF_ADDR:
|
|
|
|
set_rx_desc_buff_addr(pdesc, *(u32 *)val);
|
|
|
|
break;
|
|
|
|
case HW_DESC_RXPKT_LEN:
|
|
|
|
set_rx_desc_pkt_len(pdesc, *(u32 *)val);
|
|
|
|
break;
|
|
|
|
case HW_DESC_RXERO:
|
|
|
|
set_rx_desc_eor(pdesc, 1);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n",
|
|
|
|
desc_name);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
u64 rtl92ce_get_desc(struct ieee80211_hw *hw, u8 *p_desc8,
|
|
|
|
bool istx, u8 desc_name)
|
|
|
|
{
|
|
|
|
u32 ret = 0;
|
|
|
|
__le32 *p_desc = (__le32 *)p_desc8;
|
|
|
|
|
|
|
|
if (istx) {
|
|
|
|
switch (desc_name) {
|
|
|
|
case HW_DESC_OWN:
|
|
|
|
ret = get_tx_desc_own(p_desc);
|
|
|
|
break;
|
|
|
|
case HW_DESC_TXBUFF_ADDR:
|
|
|
|
ret = get_tx_desc_tx_buffer_address(p_desc);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n",
|
|
|
|
desc_name);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
switch (desc_name) {
|
|
|
|
case HW_DESC_OWN:
|
|
|
|
ret = get_rx_desc_own(p_desc);
|
|
|
|
break;
|
|
|
|
case HW_DESC_RXPKT_LEN:
|
|
|
|
ret = get_rx_desc_pkt_len(p_desc);
|
|
|
|
break;
|
|
|
|
case HW_DESC_RXBUFF_ADDR:
|
|
|
|
ret = get_rx_desc_buff_addr(p_desc);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n",
|
|
|
|
desc_name);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool rtl92ce_is_tx_desc_closed(struct ieee80211_hw *hw,
|
|
|
|
u8 hw_queue, u16 index)
|
|
|
|
{
|
|
|
|
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
|
|
|
struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
|
|
|
|
u8 *entry = (u8 *)(&ring->desc[ring->idx]);
|
|
|
|
u8 own = (u8)rtl92ce_get_desc(hw, entry, true, HW_DESC_OWN);
|
|
|
|
|
|
|
|
/*beacon packet will only use the first
|
|
|
|
*descriptor defautly,and the own may not
|
|
|
|
*be cleared by the hardware
|
|
|
|
*/
|
|
|
|
if (own)
|
|
|
|
return false;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
void rtl92ce_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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if (hw_queue == BEACON_QUEUE) {
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rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
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} else {
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rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
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BIT(0) << (hw_queue));
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}
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}
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