68 lines
1.4 KiB
C
68 lines
1.4 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2009-2012 Realtek Corporation.*/
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#ifndef __RTL_92S_DM_H__
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#define __RTL_92S_DM_H__
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enum dm_dig_alg {
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DIG_ALGO_BY_FALSE_ALARM = 0,
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DIG_ALGO_BY_RSSI = 1,
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DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2,
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DIG_ALGO_BY_TOW_PORT = 3,
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DIG_ALGO_MAX
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};
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enum dm_dig_two_port_alg {
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DIG_TWO_PORT_ALGO_RSSI = 0,
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DIG_TWO_PORT_ALGO_FALSE_ALARM = 1,
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};
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enum dm_dig_dbg {
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DM_DBG_OFF = 0,
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DM_DBG_ON = 1,
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DM_DBG_MAX
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};
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enum dm_dig_sta {
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DM_STA_DIG_OFF = 0,
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DM_STA_DIG_ON,
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DM_STA_DIG_MAX
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};
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enum dm_ratr_sta {
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DM_RATR_STA_HIGH = 0,
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DM_RATR_STA_MIDDLEHIGH = 1,
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DM_RATR_STA_MIDDLE = 2,
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DM_RATR_STA_MIDDLELOW = 3,
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DM_RATR_STA_LOW = 4,
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DM_RATR_STA_ULTRALOW = 5,
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DM_RATR_STA_MAX
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};
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#define DM_TYPE_BYFW 0
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#define DM_TYPE_BYDRIVER 1
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#define TX_HIGH_PWR_LEVEL_NORMAL 0
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#define TX_HIGH_PWR_LEVEL_LEVEL1 1
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#define TX_HIGH_PWR_LEVEL_LEVEL2 2
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#define HAL_DM_DIG_DISABLE BIT(0) /* Disable Dig */
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#define HAL_DM_HIPWR_DISABLE BIT(1) /* Disable High Power */
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#define TX_HIGHPWR_LEVEL_NORMAL 0
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#define TX_HIGHPWR_LEVEL_NORMAL1 1
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#define TX_HIGHPWR_LEVEL_NORMAL2 2
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#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
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#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
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#define DM_DIG_HIGH_PWR_THRESH_HIGH 75
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#define DM_DIG_HIGH_PWR_THRESH_LOW 70
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#define DM_DIG_MIN_NETCORE 0x12
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void rtl92s_dm_watchdog(struct ieee80211_hw *hw);
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void rtl92s_dm_init(struct ieee80211_hw *hw);
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void rtl92s_dm_init_edca_turbo(struct ieee80211_hw *hw);
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#endif
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