2023-08-30 17:31:07 +02:00
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/* SPDX-License-Identifier: GPL-2.0-only
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*
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* Copyright (c) 2021, MediaTek Inc.
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* Copyright (c) 2021-2022, Intel Corporation.
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*
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* Authors:
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* Haijun Liu <haijun.liu@mediatek.com>
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* Sreehari Kancharla <sreehari.kancharla@intel.com>
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*
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* Contributors:
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* Amir Hanania <amir.hanania@intel.com>
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* Ricardo Martinez <ricardo.martinez@linux.intel.com>
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*/
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#ifndef __T7XX_MHCCIF_H__
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#define __T7XX_MHCCIF_H__
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#include <linux/types.h>
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#include "t7xx_pci.h"
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#include "t7xx_reg.h"
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#define D2H_SW_INT_MASK (D2H_INT_EXCEPTION_INIT | \
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D2H_INT_EXCEPTION_INIT_DONE | \
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D2H_INT_EXCEPTION_CLEARQ_DONE | \
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D2H_INT_EXCEPTION_ALLQ_RESET | \
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D2H_INT_PORT_ENUM | \
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2023-10-24 12:59:35 +02:00
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D2H_INT_ASYNC_AP_HK | \
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2023-08-30 17:31:07 +02:00
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D2H_INT_ASYNC_MD_HK)
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void t7xx_mhccif_mask_set(struct t7xx_pci_dev *t7xx_dev, u32 val);
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void t7xx_mhccif_mask_clr(struct t7xx_pci_dev *t7xx_dev, u32 val);
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u32 t7xx_mhccif_mask_get(struct t7xx_pci_dev *t7xx_dev);
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void t7xx_mhccif_init(struct t7xx_pci_dev *t7xx_dev);
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u32 t7xx_mhccif_read_sw_int_sts(struct t7xx_pci_dev *t7xx_dev);
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void t7xx_mhccif_h2d_swint_trigger(struct t7xx_pci_dev *t7xx_dev, u32 channel);
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#endif /*__T7XX_MHCCIF_H__ */
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