62 lines
1.5 KiB
C
62 lines
1.5 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* S32 pinmux core definitions
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*
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* Copyright 2016-2020, 2022 NXP
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* Copyright (C) 2022 SUSE LLC
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright (C) 2012 Linaro Ltd.
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*/
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#ifndef __DRIVERS_PINCTRL_S32_H
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#define __DRIVERS_PINCTRL_S32_H
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struct platform_device;
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/**
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* struct s32_pin_group - describes an S32 pin group
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* @data: generic data describes group name, number of pins, and a pin array in
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this group.
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* @pin_sss: an array of source signal select configs paired with pin array.
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*/
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struct s32_pin_group {
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struct pingroup data;
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unsigned int *pin_sss;
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};
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/**
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* struct s32_pin_range - pin ID range for each memory region.
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* @start: start pin ID
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* @end: end pin ID
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*/
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struct s32_pin_range {
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unsigned int start;
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unsigned int end;
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};
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struct s32_pinctrl_soc_data {
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const struct pinctrl_pin_desc *pins;
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unsigned int npins;
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const struct s32_pin_range *mem_pin_ranges;
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unsigned int mem_regions;
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};
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struct s32_pinctrl_soc_info {
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struct device *dev;
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const struct s32_pinctrl_soc_data *soc_data;
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struct s32_pin_group *groups;
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unsigned int ngroups;
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struct pinfunction *functions;
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unsigned int nfunctions;
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unsigned int grp_index;
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};
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#define S32_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
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#define S32_PIN_RANGE(_start, _end) { .start = _start, .end = _end }
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int s32_pinctrl_probe(struct platform_device *pdev,
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const struct s32_pinctrl_soc_data *soc_data);
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int s32_pinctrl_resume(struct device *dev);
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int s32_pinctrl_suspend(struct device *dev);
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#endif /* __DRIVERS_PINCTRL_S32_H */
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