71 lines
1.9 KiB
C
71 lines
1.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Pinctrl / GPIO driver for StarFive JH7110 SoC
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*
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* Copyright (C) 2022 StarFive Technology Co., Ltd.
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*/
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#ifndef __PINCTRL_STARFIVE_JH7110_H__
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#define __PINCTRL_STARFIVE_JH7110_H__
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinmux.h>
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struct jh7110_pinctrl {
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struct device *dev;
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struct gpio_chip gc;
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struct pinctrl_gpio_range gpios;
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raw_spinlock_t lock;
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void __iomem *base;
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struct pinctrl_dev *pctl;
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/* register read/write mutex */
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struct mutex mutex;
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const struct jh7110_pinctrl_soc_info *info;
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};
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struct jh7110_gpio_irq_reg {
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unsigned int is_reg_base;
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unsigned int ic_reg_base;
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unsigned int ibe_reg_base;
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unsigned int iev_reg_base;
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unsigned int ie_reg_base;
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unsigned int ris_reg_base;
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unsigned int mis_reg_base;
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};
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struct jh7110_pinctrl_soc_info {
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const struct pinctrl_pin_desc *pins;
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unsigned int npins;
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unsigned int ngpios;
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unsigned int gc_base;
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/* gpio dout/doen/din/gpioinput register */
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unsigned int dout_reg_base;
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unsigned int dout_mask;
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unsigned int doen_reg_base;
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unsigned int doen_mask;
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unsigned int gpi_reg_base;
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unsigned int gpi_mask;
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unsigned int gpioin_reg_base;
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const struct jh7110_gpio_irq_reg *irq_reg;
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/* generic pinmux */
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int (*jh7110_set_one_pin_mux)(struct jh7110_pinctrl *sfp,
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unsigned int pin,
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unsigned int din, u32 dout,
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u32 doen, u32 func);
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/* gpio chip */
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int (*jh7110_get_padcfg_base)(struct jh7110_pinctrl *sfp,
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unsigned int pin);
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void (*jh7110_gpio_irq_handler)(struct irq_desc *desc);
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int (*jh7110_gpio_init_hw)(struct gpio_chip *gc);
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};
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void jh7110_set_gpiomux(struct jh7110_pinctrl *sfp, unsigned int pin,
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unsigned int din, u32 dout, u32 doen);
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int jh7110_pinctrl_probe(struct platform_device *pdev);
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struct jh7110_pinctrl *jh7110_from_irq_desc(struct irq_desc *desc);
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#endif /* __PINCTRL_STARFIVE_JH7110_H__ */
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