208 lines
5.0 KiB
C
208 lines
5.0 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/reset.h>
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#define PD_STATE_ON 1
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#define PD_STATE_OFF 2
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#define PD_RSTN_REG 0x00
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#define PD_CLK_GATE_REG 0x04
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#define PD_PWROFF_GATE_REG 0x08
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#define PD_PSW_ON_REG 0x0c
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#define PD_PSW_OFF_REG 0x10
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#define PD_PSW_DELAY_REG 0x14
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#define PD_OFF_DELAY_REG 0x18
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#define PD_ON_DELAY_REG 0x1c
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#define PD_COMMAND_REG 0x20
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#define PD_STATUS_REG 0x24
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#define PD_STATUS_COMPLETE BIT(1)
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#define PD_STATUS_BUSY BIT(3)
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#define PD_STATUS_STATE GENMASK(17, 16)
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#define PD_ACTIVE_CTRL_REG 0x2c
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#define PD_GATE_STATUS_REG 0x30
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#define PD_RSTN_STATUS BIT(0)
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#define PD_CLK_GATE_STATUS BIT(1)
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#define PD_PWROFF_GATE_STATUS BIT(2)
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#define PD_PSW_STATUS_REG 0x34
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#define PD_REGS_SIZE 0x80
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struct sun20i_ppu_desc {
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const char *const *names;
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unsigned int num_domains;
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};
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struct sun20i_ppu_pd {
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struct generic_pm_domain genpd;
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void __iomem *base;
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};
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#define to_sun20i_ppu_pd(_genpd) \
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container_of(_genpd, struct sun20i_ppu_pd, genpd)
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static bool sun20i_ppu_pd_is_on(const struct sun20i_ppu_pd *pd)
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{
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u32 status = readl(pd->base + PD_STATUS_REG);
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return FIELD_GET(PD_STATUS_STATE, status) == PD_STATE_ON;
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}
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static int sun20i_ppu_pd_set_power(const struct sun20i_ppu_pd *pd, bool power_on)
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{
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u32 state, status;
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int ret;
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if (sun20i_ppu_pd_is_on(pd) == power_on)
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return 0;
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/* Wait for the power controller to be idle. */
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ret = readl_poll_timeout(pd->base + PD_STATUS_REG, status,
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!(status & PD_STATUS_BUSY), 100, 1000);
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if (ret)
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return ret;
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state = power_on ? PD_STATE_ON : PD_STATE_OFF;
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writel(state, pd->base + PD_COMMAND_REG);
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/* Wait for the state transition to complete. */
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ret = readl_poll_timeout(pd->base + PD_STATUS_REG, status,
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FIELD_GET(PD_STATUS_STATE, status) == state &&
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(status & PD_STATUS_COMPLETE), 100, 1000);
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if (ret)
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return ret;
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/* Clear the completion flag. */
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writel(status, pd->base + PD_STATUS_REG);
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return 0;
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}
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static int sun20i_ppu_pd_power_on(struct generic_pm_domain *genpd)
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{
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const struct sun20i_ppu_pd *pd = to_sun20i_ppu_pd(genpd);
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return sun20i_ppu_pd_set_power(pd, true);
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}
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static int sun20i_ppu_pd_power_off(struct generic_pm_domain *genpd)
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{
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const struct sun20i_ppu_pd *pd = to_sun20i_ppu_pd(genpd);
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return sun20i_ppu_pd_set_power(pd, false);
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}
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static int sun20i_ppu_probe(struct platform_device *pdev)
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{
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const struct sun20i_ppu_desc *desc;
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struct device *dev = &pdev->dev;
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struct genpd_onecell_data *ppu;
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struct sun20i_ppu_pd *pds;
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struct reset_control *rst;
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void __iomem *base;
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struct clk *clk;
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int ret;
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desc = of_device_get_match_data(dev);
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if (!desc)
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return -EINVAL;
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pds = devm_kcalloc(dev, desc->num_domains, sizeof(*pds), GFP_KERNEL);
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if (!pds)
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return -ENOMEM;
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ppu = devm_kzalloc(dev, sizeof(*ppu), GFP_KERNEL);
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if (!ppu)
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return -ENOMEM;
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ppu->domains = devm_kcalloc(dev, desc->num_domains,
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sizeof(*ppu->domains), GFP_KERNEL);
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if (!ppu->domains)
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return -ENOMEM;
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ppu->num_domains = desc->num_domains;
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platform_set_drvdata(pdev, ppu);
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base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(base))
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return PTR_ERR(base);
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clk = devm_clk_get_enabled(dev, NULL);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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rst = devm_reset_control_get_exclusive(dev, NULL);
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if (IS_ERR(rst))
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return PTR_ERR(rst);
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ret = reset_control_deassert(rst);
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if (ret)
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return ret;
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for (unsigned int i = 0; i < ppu->num_domains; ++i) {
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struct sun20i_ppu_pd *pd = &pds[i];
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pd->genpd.name = desc->names[i];
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pd->genpd.power_off = sun20i_ppu_pd_power_off;
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pd->genpd.power_on = sun20i_ppu_pd_power_on;
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pd->base = base + PD_REGS_SIZE * i;
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ret = pm_genpd_init(&pd->genpd, NULL, sun20i_ppu_pd_is_on(pd));
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if (ret) {
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dev_warn(dev, "Failed to add '%s' domain: %d\n",
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pd->genpd.name, ret);
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continue;
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}
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ppu->domains[i] = &pd->genpd;
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}
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ret = of_genpd_add_provider_onecell(dev->of_node, ppu);
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if (ret)
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dev_warn(dev, "Failed to add provider: %d\n", ret);
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return 0;
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}
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static const char *const sun20i_d1_ppu_pd_names[] = {
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"CPU",
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"VE",
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"DSP",
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};
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static const struct sun20i_ppu_desc sun20i_d1_ppu_desc = {
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.names = sun20i_d1_ppu_pd_names,
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.num_domains = ARRAY_SIZE(sun20i_d1_ppu_pd_names),
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};
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static const struct of_device_id sun20i_ppu_of_match[] = {
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{
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.compatible = "allwinner,sun20i-d1-ppu",
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.data = &sun20i_d1_ppu_desc,
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},
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{ }
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};
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MODULE_DEVICE_TABLE(of, sun20i_ppu_of_match);
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static struct platform_driver sun20i_ppu_driver = {
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.probe = sun20i_ppu_probe,
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.driver = {
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.name = "sun20i-ppu",
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.of_match_table = sun20i_ppu_of_match,
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/* Power domains cannot be removed while they are in use. */
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.suppress_bind_attrs = true,
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},
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};
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module_platform_driver(sun20i_ppu_driver);
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MODULE_AUTHOR("Samuel Holland <samuel@sholland.org>");
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MODULE_DESCRIPTION("Allwinner D1 PPU power domain driver");
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MODULE_LICENSE("GPL");
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