306 lines
8.0 KiB
C
306 lines
8.0 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <asm/setup.h>
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#include <asm/irq.h>
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#include <asm/amigahw.h>
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#include <asm/amigaints.h>
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#include <asm/apollohw.h>
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#include <linux/fb.h>
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#include <linux/module.h>
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/* apollo video HW definitions */
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/*
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* Control Registers. IOBASE + $x
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*
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* Note: these are the Memory/IO BASE definitions for a mono card set to the
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* alternate address
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*
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* Control 3A and 3B serve identical functions except that 3A
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* deals with control 1 and 3b deals with Color LUT reg.
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*/
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#define AP_IOBASE 0x3b0 /* Base address of 1 plane board. */
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#define AP_STATUS isaIO2mem(AP_IOBASE+0) /* Status register. Read */
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#define AP_WRITE_ENABLE isaIO2mem(AP_IOBASE+0) /* Write Enable Register Write */
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#define AP_DEVICE_ID isaIO2mem(AP_IOBASE+1) /* Device ID Register. Read */
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#define AP_ROP_1 isaIO2mem(AP_IOBASE+2) /* Raster Operation reg. Write Word */
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#define AP_DIAG_MEM_REQ isaIO2mem(AP_IOBASE+4) /* Diagnostic Memory Request. Write Word */
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#define AP_CONTROL_0 isaIO2mem(AP_IOBASE+8) /* Control Register 0. Read/Write */
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#define AP_CONTROL_1 isaIO2mem(AP_IOBASE+0xa) /* Control Register 1. Read/Write */
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#define AP_CONTROL_3A isaIO2mem(AP_IOBASE+0xe) /* Control Register 3a. Read/Write */
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#define AP_CONTROL_2 isaIO2mem(AP_IOBASE+0xc) /* Control Register 2. Read/Write */
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#define FRAME_BUFFER_START 0x0FA0000
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#define FRAME_BUFFER_LEN 0x40000
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/* CREG 0 */
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#define VECTOR_MODE 0x40 /* 010x.xxxx */
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#define DBLT_MODE 0x80 /* 100x.xxxx */
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#define NORMAL_MODE 0xE0 /* 111x.xxxx */
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#define SHIFT_BITS 0x1F /* xxx1.1111 */
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/* other bits are Shift value */
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/* CREG 1 */
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#define AD_BLT 0x80 /* 1xxx.xxxx */
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#define NORMAL 0x80 /* 1xxx.xxxx */ /* What is happening here ?? */
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#define INVERSE 0x00 /* 0xxx.xxxx */ /* Clearing this reverses the screen */
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#define PIX_BLT 0x00 /* 0xxx.xxxx */
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#define AD_HIBIT 0x40 /* xIxx.xxxx */
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#define ROP_EN 0x10 /* xxx1.xxxx */
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#define DST_EQ_SRC 0x00 /* xxx0.xxxx */
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#define nRESET_SYNC 0x08 /* xxxx.1xxx */
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#define SYNC_ENAB 0x02 /* xxxx.xx1x */
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#define BLANK_DISP 0x00 /* xxxx.xxx0 */
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#define ENAB_DISP 0x01 /* xxxx.xxx1 */
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#define NORM_CREG1 (nRESET_SYNC | SYNC_ENAB | ENAB_DISP) /* no reset sync */
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/* CREG 2 */
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/*
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* Following 3 defines are common to 1, 4 and 8 plane.
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*/
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#define S_DATA_1s 0x00 /* 00xx.xxxx */ /* set source to all 1's -- vector drawing */
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#define S_DATA_PIX 0x40 /* 01xx.xxxx */ /* takes source from ls-bits and replicates over 16 bits */
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#define S_DATA_PLN 0xC0 /* 11xx.xxxx */ /* normal, each data access =16-bits in
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one plane of image mem */
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/* CREG 3A/CREG 3B */
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# define RESET_CREG 0x80 /* 1000.0000 */
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/* ROP REG - all one nibble */
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/* ********* NOTE : this is used r0,r1,r2,r3 *********** */
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#define ROP(r2,r3,r0,r1) ( (U_SHORT)((r0)|((r1)<<4)|((r2)<<8)|((r3)<<12)) )
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#define DEST_ZERO 0x0
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#define SRC_AND_DEST 0x1
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#define SRC_AND_nDEST 0x2
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#define SRC 0x3
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#define nSRC_AND_DEST 0x4
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#define DEST 0x5
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#define SRC_XOR_DEST 0x6
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#define SRC_OR_DEST 0x7
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#define SRC_NOR_DEST 0x8
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#define SRC_XNOR_DEST 0x9
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#define nDEST 0xA
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#define SRC_OR_nDEST 0xB
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#define nSRC 0xC
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#define nSRC_OR_DEST 0xD
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#define SRC_NAND_DEST 0xE
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#define DEST_ONE 0xF
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#define SWAP(A) ((A>>8) | ((A&0xff) <<8))
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/* frame buffer operations */
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static int dnfb_blank(int blank, struct fb_info *info);
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static void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
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static const struct fb_ops dn_fb_ops = {
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.owner = THIS_MODULE,
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.fb_blank = dnfb_blank,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = dnfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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};
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static const struct fb_var_screeninfo dnfb_var = {
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.xres = 1280,
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.yres = 1024,
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.xres_virtual = 2048,
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.yres_virtual = 1024,
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.bits_per_pixel = 1,
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.height = -1,
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.width = -1,
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.vmode = FB_VMODE_NONINTERLACED,
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};
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static const struct fb_fix_screeninfo dnfb_fix = {
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.id = "Apollo Mono",
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.smem_start = (FRAME_BUFFER_START + IO_BASE),
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.smem_len = FRAME_BUFFER_LEN,
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.type = FB_TYPE_PACKED_PIXELS,
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.visual = FB_VISUAL_MONO10,
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.line_length = 256,
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};
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static int dnfb_blank(int blank, struct fb_info *info)
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{
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if (blank)
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out_8(AP_CONTROL_3A, 0x0);
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else
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out_8(AP_CONTROL_3A, 0x1);
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return 0;
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}
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static
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void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
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{
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int incr, y_delta, pre_read = 0, x_end, x_word_count;
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uint start_mask, end_mask, dest;
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ushort *src, dummy;
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short i, j;
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incr = (area->dy <= area->sy) ? 1 : -1;
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src = (ushort *)(info->screen_base + area->sy * info->fix.line_length +
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(area->sx >> 4));
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dest = area->dy * (info->fix.line_length >> 1) + (area->dx >> 4);
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if (incr > 0) {
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y_delta = (info->fix.line_length * 8) - area->sx - area->width;
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x_end = area->dx + area->width - 1;
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x_word_count = (x_end >> 4) - (area->dx >> 4) + 1;
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start_mask = 0xffff0000 >> (area->dx & 0xf);
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end_mask = 0x7ffff >> (x_end & 0xf);
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out_8(AP_CONTROL_0,
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(((area->dx & 0xf) - (area->sx & 0xf)) % 16) | (0x4 << 5));
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if ((area->dx & 0xf) < (area->sx & 0xf))
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pre_read = 1;
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} else {
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y_delta = -((info->fix.line_length * 8) - area->sx - area->width);
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x_end = area->dx - area->width + 1;
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x_word_count = (area->dx >> 4) - (x_end >> 4) + 1;
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start_mask = 0x7ffff >> (area->dx & 0xf);
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end_mask = 0xffff0000 >> (x_end & 0xf);
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out_8(AP_CONTROL_0,
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((-((area->sx & 0xf) - (area->dx & 0xf))) % 16) |
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(0x4 << 5));
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if ((area->dx & 0xf) > (area->sx & 0xf))
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pre_read = 1;
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}
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for (i = 0; i < area->height; i++) {
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out_8(AP_CONTROL_3A, 0xc | (dest >> 16));
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if (pre_read) {
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dummy = *src;
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src += incr;
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}
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if (x_word_count) {
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out_8(AP_WRITE_ENABLE, start_mask);
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*src = dest;
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src += incr;
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dest += incr;
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out_8(AP_WRITE_ENABLE, 0);
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for (j = 1; j < (x_word_count - 1); j++) {
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*src = dest;
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src += incr;
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dest += incr;
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}
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out_8(AP_WRITE_ENABLE, start_mask);
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*src = dest;
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dest += incr;
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src += incr;
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} else {
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out_8(AP_WRITE_ENABLE, start_mask | end_mask);
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*src = dest;
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dest += incr;
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src += incr;
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}
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src += (y_delta / 16);
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dest += (y_delta / 16);
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}
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out_8(AP_CONTROL_0, NORMAL_MODE);
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}
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/*
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* Initialization
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*/
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static int dnfb_probe(struct platform_device *dev)
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{
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struct fb_info *info;
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int err = 0;
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info = framebuffer_alloc(0, &dev->dev);
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if (!info)
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return -ENOMEM;
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info->fbops = &dn_fb_ops;
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info->fix = dnfb_fix;
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info->var = dnfb_var;
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info->var.red.length = 1;
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info->var.red.offset = 0;
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info->var.green = info->var.blue = info->var.red;
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info->screen_base = (u_char *) info->fix.smem_start;
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err = fb_alloc_cmap(&info->cmap, 2, 0);
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if (err < 0)
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goto release_framebuffer;
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err = register_framebuffer(info);
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if (err < 0) {
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fb_dealloc_cmap(&info->cmap);
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goto release_framebuffer;
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}
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platform_set_drvdata(dev, info);
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/* now we have registered we can safely setup the hardware */
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out_8(AP_CONTROL_3A, RESET_CREG);
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out_be16(AP_WRITE_ENABLE, 0x0);
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out_8(AP_CONTROL_0, NORMAL_MODE);
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out_8(AP_CONTROL_1, (AD_BLT | DST_EQ_SRC | NORM_CREG1));
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out_8(AP_CONTROL_2, S_DATA_PLN);
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out_be16(AP_ROP_1, SWAP(0x3));
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printk("apollo frame buffer alive and kicking !\n");
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return err;
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release_framebuffer:
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framebuffer_release(info);
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return err;
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}
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static struct platform_driver dnfb_driver = {
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.probe = dnfb_probe,
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.driver = {
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.name = "dnfb",
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},
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};
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static struct platform_device dnfb_device = {
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.name = "dnfb",
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};
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static int __init dnfb_init(void)
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{
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int ret;
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if (!MACH_IS_APOLLO)
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return -ENODEV;
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if (fb_get_options("dnfb", NULL))
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return -ENODEV;
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ret = platform_driver_register(&dnfb_driver);
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if (!ret) {
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ret = platform_device_register(&dnfb_device);
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if (ret)
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platform_driver_unregister(&dnfb_driver);
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}
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return ret;
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}
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module_init(dnfb_init);
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MODULE_LICENSE("GPL");
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