27 lines
622 B
C
27 lines
622 B
C
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/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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* Copyright 2021 NXP
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*/
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#ifndef __DT_BINDINGS_IMX8ULP_POWER_H__
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#define __DT_BINDINGS_IMX8ULP_POWER_H__
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#define IMX8ULP_PD_DMA1 0
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#define IMX8ULP_PD_FLEXSPI2 1
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#define IMX8ULP_PD_USB0 2
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#define IMX8ULP_PD_USDHC0 3
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#define IMX8ULP_PD_USDHC1 4
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#define IMX8ULP_PD_USDHC2_USB1 5
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#define IMX8ULP_PD_DCNANO 6
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#define IMX8ULP_PD_EPDC 7
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#define IMX8ULP_PD_DMA2 8
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#define IMX8ULP_PD_GPU2D 9
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#define IMX8ULP_PD_GPU3D 10
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#define IMX8ULP_PD_HIFI4 11
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#define IMX8ULP_PD_ISI 12
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#define IMX8ULP_PD_MIPI_CSI 13
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#define IMX8ULP_PD_MIPI_DSI 14
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#define IMX8ULP_PD_PXP 15
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#endif
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