115 lines
3.3 KiB
YAML
115 lines
3.3 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: MediaTek mmsys controller
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maintainers:
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- Matthias Brugger <matthias.bgg@gmail.com>
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description:
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The MediaTek mmsys system controller provides clock control, routing control,
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and miscellaneous control in mmsys partition.
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properties:
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$nodename:
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pattern: "^syscon@[0-9a-f]+$"
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compatible:
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oneOf:
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- items:
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- enum:
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- mediatek,mt2701-mmsys
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- mediatek,mt2712-mmsys
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- mediatek,mt6765-mmsys
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- mediatek,mt6779-mmsys
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- mediatek,mt6795-mmsys
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- mediatek,mt6797-mmsys
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- mediatek,mt8167-mmsys
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- mediatek,mt8173-mmsys
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- mediatek,mt8183-mmsys
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- mediatek,mt8186-mmsys
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- mediatek,mt8188-vdosys0
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- mediatek,mt8192-mmsys
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- mediatek,mt8195-vdosys1
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- mediatek,mt8195-vppsys0
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- mediatek,mt8195-vppsys1
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- mediatek,mt8365-mmsys
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- const: syscon
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- description: vdosys0 and vdosys1 are 2 display HW pipelines,
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so mt8195 binding should be deprecated.
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deprecated: true
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items:
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- const: mediatek,mt8195-mmsys
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- const: syscon
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- items:
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- const: mediatek,mt7623-mmsys
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- const: mediatek,mt2701-mmsys
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- const: syscon
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- items:
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- const: mediatek,mt8195-vdosys0
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- const: mediatek,mt8195-mmsys
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- const: syscon
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reg:
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maxItems: 1
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power-domains:
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description:
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A phandle and PM domain specifier as defined by bindings
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of the power controller specified by phandle. See
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Documentation/devicetree/bindings/power/power-domain.yaml for details.
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mboxes:
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description:
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Using mailbox to communicate with GCE, it should have this
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property and list of phandle, mailbox specifiers. See
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Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
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for details.
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$ref: /schemas/types.yaml#/definitions/phandle-array
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mediatek,gce-client-reg:
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description:
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The register of client driver can be configured by gce with 4 arguments
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defined in this property, such as phandle of gce, subsys id,
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register offset and size.
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Each subsys id is mapping to a base address of display function blocks
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register which is defined in the gce header
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include/dt-bindings/gce/<chip>-gce.h.
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$ref: /schemas/types.yaml#/definitions/phandle-array
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maxItems: 1
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"#clock-cells":
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const: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- "#clock-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/power/mt8173-power.h>
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#include <dt-bindings/gce/mt8173-gce.h>
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mmsys: syscon@14000000 {
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compatible = "mediatek,mt8173-mmsys", "syscon";
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reg = <0x14000000 0x1000>;
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power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
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<&gce 1 CMDQ_THR_PRIO_HIGHEST>;
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mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
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};
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