82 lines
1.9 KiB
YAML
82 lines
1.9 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller on IPQ8064
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maintainers:
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- Ansuel Smith <ansuelsmth@gmail.com>
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description: |
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Qualcomm global clock control module provides the clocks, resets and power
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domains on IPQ8064.
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See also::
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include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
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include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
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allOf:
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- $ref: qcom,gcc.yaml#
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properties:
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compatible:
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items:
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- const: qcom,gcc-ipq8064
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- const: syscon
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clocks:
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minItems: 2
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items:
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- description: PXO source
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- description: CXO source
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- description: PLL4 from LCC
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clock-names:
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minItems: 2
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items:
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- const: pxo
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- const: cxo
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- const: pll4
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thermal-sensor:
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type: object
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allOf:
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- $ref: /schemas/thermal/qcom-tsens.yaml#
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required:
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- compatible
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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gcc: clock-controller@900000 {
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compatible = "qcom,gcc-ipq8064", "syscon";
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reg = <0x00900000 0x4000>;
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clocks = <&pxo_board>, <&cxo_board>, <&lcc PLL4>;
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clock-names = "pxo", "cxo", "pll4";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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tsens: thermal-sensor {
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compatible = "qcom,ipq8064-tsens";
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nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
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nvmem-cell-names = "calib", "calib_backup";
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interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow";
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#qcom,sensors = <11>;
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#thermal-sensor-cells = <1>;
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};
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};
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