125 lines
3.6 KiB
YAML
125 lines
3.6 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright 2022 Unisoc Inc.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Unisoc EIC controller
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maintainers:
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- Orson Zhai <orsonzhai@gmail.com>
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- Baolin Wang <baolin.wang7@gmail.com>
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- Chunyan Zhang <zhang.lyra@gmail.com>
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description: |
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The EIC is the abbreviation of external interrupt controller, which can
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be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
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one is in digital chip, and another one is in PMIC. The digital chip EIC
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controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
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EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
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module.
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The EIC-debounce sub-module provides up to 8 source input signal
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connections. A debounce mechanism is used to capture the input signals'
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stable status (millisecond resolution) and a single-trigger mechanism
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is introduced into this sub-module to enhance the input event detection
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reliability. In addition, this sub-module's clock can be shut off
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automatically to reduce power dissipation. Moreover the debounce range
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is from 1ms to 4s with a step size of 1ms. The input signal will be
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ignored if it is asserted for less than 1 ms.
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The EIC-latch sub-module is used to latch some special power down signals
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and generate interrupts, since the EIC-latch does not depend on the APB
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clock to capture signals.
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The EIC-async sub-module uses a 32kHz clock to capture the short signals
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(microsecond resolution) to generate interrupts by level or edge trigger.
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The EIC-sync is similar with GPIO's input function, which is a synchronized
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signal input register. It can generate interrupts by level or edge trigger
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when detecting input signals.
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properties:
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compatible:
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oneOf:
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- enum:
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- sprd,sc9860-eic-debounce
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- sprd,sc9860-eic-latch
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- sprd,sc9860-eic-async
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- sprd,sc9860-eic-sync
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- sprd,sc2731-eic
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- items:
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- enum:
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- sprd,ums512-eic-debounce
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- const: sprd,sc9860-eic-debounce
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- items:
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- enum:
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- sprd,ums512-eic-latch
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- const: sprd,sc9860-eic-latch
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- items:
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- enum:
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- sprd,ums512-eic-async
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- const: sprd,sc9860-eic-async
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- items:
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- enum:
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- sprd,ums512-eic-sync
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- const: sprd,sc9860-eic-sync
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- items:
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- enum:
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- sprd,sc2730-eic
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- const: sprd,sc2731-eic
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reg:
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minItems: 1
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maxItems: 3
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description:
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EIC controller can support maximum 3 banks which has its own
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address base.
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gpio-controller: true
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"#gpio-cells":
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const: 2
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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interrupts:
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maxItems: 1
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description:
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The interrupt shared by all GPIO lines for this controller.
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required:
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- compatible
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- reg
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- gpio-controller
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- "#gpio-cells"
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- interrupt-controller
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- "#interrupt-cells"
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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eic_debounce: gpio@40210000 {
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compatible = "sprd,sc9860-eic-debounce";
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reg = <0 0x40210000 0 0x80>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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...
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