78 lines
1.8 KiB
YAML
78 lines
1.8 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: nuvoton NPCM7XX I2C Controller
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description: |
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I2C bus controllers of the NPCM series support both master and
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slave mode. Each controller can switch between master and slave at run time
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(i.e. IPMB mode). HW FIFO for TX and RX are supported.
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maintainers:
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- Tali Perry <tali.perry1@gmail.com>
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properties:
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compatible:
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enum:
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- nuvoton,npcm750-i2c
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- nuvoton,npcm845-i2c
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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description: Reference clock for the I2C bus
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clock-frequency:
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description: Desired I2C bus clock frequency in Hz. If not specified,
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the default 100 kHz frequency will be used.
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possible values are 100000, 400000 and 1000000.
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default: 100000
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enum: [100000, 400000, 1000000]
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nuvoton,sys-mgr:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: The phandle of system manager register node.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: nuvoton,npcm845-i2c
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then:
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required:
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- nuvoton,sys-mgr
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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i2c0: i2c@80000 {
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reg = <0x80000 0x1000>;
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clocks = <&clk NPCM7XX_CLK_APB2>;
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clock-frequency = <100000>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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compatible = "nuvoton,npcm750-i2c";
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nuvoton,sys-mgr = <&gcr>;
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};
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...
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