79 lines
1.5 KiB
YAML
79 lines
1.5 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP IMX8QXP ADC
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maintainers:
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- Cai Huoqing <caihuoqing@baidu.com>
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description:
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Supports the ADC found on the IMX8QXP SoC.
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properties:
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compatible:
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const: nxp,imx8qxp-adc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: per
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- const: ipg
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assigned-clocks:
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maxItems: 1
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assigned-clock-rates:
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maxItems: 1
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power-domains:
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maxItems: 1
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"#io-channel-cells":
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- assigned-clocks
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- assigned-clock-rates
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- power-domains
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- "#io-channel-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/firmware/imx/rsrc.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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adc@5a880000 {
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compatible = "nxp,imx8qxp-adc";
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reg = <0x0 0x5a880000 0x0 0x10000>;
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interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX_SC_R_ADC_0>,
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<&clk IMX_SC_R_ADC_0>;
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clock-names = "per", "ipg";
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assigned-clocks = <&clk IMX_SC_R_ADC_0>;
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assigned-clock-rates = <24000000>;
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power-domains = <&pd IMX_SC_R_ADC_0>;
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#io-channel-cells = <1>;
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};
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};
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...
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