88 lines
2.2 KiB
YAML
88 lines
2.2 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/ti,adc12138.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments ADC12138 and similar self-calibrating ADCs
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maintainers:
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- Akinobu Mita <akinobu.mita@gmail.com>
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description: |
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13 bit ADCs with 1, 2 or 8 inputs and self calibrating circuitry to
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correct for linearity, zero and full scale errors.
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properties:
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compatible:
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enum:
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- ti,adc12130
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- ti,adc12132
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- ti,adc12138
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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description: End of Conversion (EOC) interrupt
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clocks:
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maxItems: 1
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description: Conversion clock input.
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vref-p-supply:
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description: The regulator supply for positive analog voltage reference
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vref-n-supply:
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description: |
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The regulator supply for negative analog voltage reference
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(Note that this must not go below GND or exceed vref-p)
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If not specified, this is assumed to be analog ground.
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ti,acquisition-time:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 6, 10, 18, 34 ]
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description: |
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The number of conversion clock periods for the S/H's acquisition time.
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For high source impedances, this value can be increased to 18 or 34.
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For less ADC accuracy and/or slower CCLK frequencies this value may be
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decreased to 6. See section 6.0 INPUT SOURCE RESISTANCE in the
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datasheet for details.
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"#io-channel-cells":
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- vref-p-supply
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allOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "ti,adc12138";
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reg = <0>;
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interrupts = <28 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&gpio1>;
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clocks = <&cclk>;
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vref-p-supply = <&ldo4_reg>;
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spi-max-frequency = <5000000>;
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ti,acquisition-time = <6>;
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#io-channel-cells = <1>;
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};
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};
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...
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