81 lines
1.6 KiB
YAML
81 lines
1.6 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip SoC MIPI RX0 D-PHY
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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description: |
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The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP wich
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connects to the ISP1 (Image Signal Processing unit v1.0) for CSI cameras.
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properties:
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compatible:
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enum:
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- rockchip,px30-csi-dphy
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- rockchip,rk1808-csi-dphy
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- rockchip,rk3326-csi-dphy
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- rockchip,rk3368-csi-dphy
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- rockchip,rk3568-csi-dphy
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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const: pclk
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'#phy-cells':
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const: 0
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power-domains:
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description: Video in/out power domain.
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maxItems: 1
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resets:
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items:
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- description: exclusive PHY reset line
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reset-names:
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items:
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- const: apb
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rockchip,grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Some additional phy settings are access through GRF regs.
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#phy-cells'
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- power-domains
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- resets
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- reset-names
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- rockchip,grf
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additionalProperties: false
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examples:
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- |
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csi_dphy: phy@ff2f0000 {
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compatible = "rockchip,px30-csi-dphy";
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reg = <0xff2f0000 0x4000>;
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clocks = <&cru 1>;
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clock-names = "pclk";
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#phy-cells = <0>;
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power-domains = <&power 1>;
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resets = <&cru 1>;
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reset-names = "apb";
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rockchip,grf = <&grf>;
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};
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