128 lines
3.3 KiB
YAML
128 lines
3.3 KiB
YAML
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||
|
%YAML 1.2
|
||
|
---
|
||
|
$id: http://devicetree.org/schemas/pinctrl/qcom,msm8660-pinctrl.yaml#
|
||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||
|
|
||
|
title: Qualcomm MSM8660 TLMM pin controller
|
||
|
|
||
|
maintainers:
|
||
|
- Bjorn Andersson <andersson@kernel.org>
|
||
|
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||
|
|
||
|
description:
|
||
|
Top Level Mode Multiplexer pin controller in Qualcomm MSM8660 SoC.
|
||
|
|
||
|
properties:
|
||
|
compatible:
|
||
|
const: qcom,msm8660-pinctrl
|
||
|
|
||
|
reg:
|
||
|
maxItems: 1
|
||
|
|
||
|
interrupts:
|
||
|
maxItems: 1
|
||
|
|
||
|
interrupt-controller: true
|
||
|
"#interrupt-cells": true
|
||
|
gpio-controller: true
|
||
|
"#gpio-cells": true
|
||
|
gpio-ranges: true
|
||
|
wakeup-parent: true
|
||
|
|
||
|
gpio-reserved-ranges:
|
||
|
minItems: 1
|
||
|
maxItems: 86
|
||
|
|
||
|
gpio-line-names:
|
||
|
maxItems: 173
|
||
|
|
||
|
patternProperties:
|
||
|
"-state$":
|
||
|
oneOf:
|
||
|
- $ref: "#/$defs/qcom-msm8660-tlmm-state"
|
||
|
- patternProperties:
|
||
|
"-pins$":
|
||
|
$ref: "#/$defs/qcom-msm8660-tlmm-state"
|
||
|
additionalProperties: false
|
||
|
|
||
|
$defs:
|
||
|
qcom-msm8660-tlmm-state:
|
||
|
type: object
|
||
|
description:
|
||
|
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||
|
Client device subnodes use below standard properties.
|
||
|
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
|
||
|
|
||
|
properties:
|
||
|
pins:
|
||
|
description:
|
||
|
List of gpio pins affected by the properties specified in this
|
||
|
subnode.
|
||
|
items:
|
||
|
oneOf:
|
||
|
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-2])$"
|
||
|
- enum: [ sdc3_clk, sdc3_cmd, sdc3_data, sdc4_clk, sdc4_cmd, sdc4_data ]
|
||
|
minItems: 1
|
||
|
maxItems: 36
|
||
|
|
||
|
function:
|
||
|
description:
|
||
|
Specify the alternative function to be configured for the specified
|
||
|
pins.
|
||
|
|
||
|
enum: [ gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a,
|
||
|
gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gsbi1, gsbi1_spi_cs1_n,
|
||
|
gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n, gsbi1_spi_cs3_n, gsbi2,
|
||
|
gsbi2_spi_cs1_n, gsbi2_spi_cs2_n, gsbi2_spi_cs3_n, gsbi3,
|
||
|
gsbi3_spi_cs1_n, gsbi3_spi_cs2_n, gsbi3_spi_cs3_n, gsbi4,
|
||
|
gsbi5, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, gsbi12,
|
||
|
hdmi, i2s, lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2,
|
||
|
sdc5, tsif1, tsif2, usb_fs1, usb_fs1_oe_n, usb_fs2,
|
||
|
usb_fs2_oe_n, vfe, vsens_alarm, ebi2, ebi2cs ]
|
||
|
|
||
|
|
||
|
bias-pull-down: true
|
||
|
bias-pull-up: true
|
||
|
bias-disable: true
|
||
|
drive-strength: true
|
||
|
input-enable: true
|
||
|
output-high: true
|
||
|
output-low: true
|
||
|
|
||
|
required:
|
||
|
- pins
|
||
|
|
||
|
additionalProperties: false
|
||
|
|
||
|
allOf:
|
||
|
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
|
||
|
|
||
|
required:
|
||
|
- compatible
|
||
|
- reg
|
||
|
|
||
|
additionalProperties: false
|
||
|
|
||
|
examples:
|
||
|
- |
|
||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||
|
tlmm: pinctrl@800000 {
|
||
|
compatible = "qcom,msm8660-pinctrl";
|
||
|
reg = <0x800000 0x4000>;
|
||
|
|
||
|
gpio-controller;
|
||
|
gpio-ranges = <&tlmm 0 0 173>;
|
||
|
#gpio-cells = <2>;
|
||
|
interrupts = <0 16 0x4>;
|
||
|
interrupt-controller;
|
||
|
#interrupt-cells = <2>;
|
||
|
|
||
|
gsbi3-i2c-state {
|
||
|
pins = "gpio43", "gpio44";
|
||
|
function = "gsbi3";
|
||
|
drive-strength = <8>;
|
||
|
bias-disable;
|
||
|
};
|
||
|
};
|