226 lines
3.7 KiB
Plaintext
226 lines
3.7 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for Freescale LS2080A QDS Board.
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*
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* Copyright 2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*
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* Abhimanyu Saini <abhimanyu.saini@nxp.com>
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*
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*/
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/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
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&dpmac9 {
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phy-handle = <&mdio0_phy12>;
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phy-connection-type = "sgmii";
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};
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&dpmac10 {
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phy-handle = <&mdio0_phy13>;
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phy-connection-type = "sgmii";
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};
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&dpmac11 {
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phy-handle = <&mdio0_phy14>;
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phy-connection-type = "sgmii";
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};
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&dpmac12 {
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phy-handle = <&mdio0_phy15>;
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phy-connection-type = "sgmii";
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};
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&esdhc {
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mmc-hs200-1_8v;
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status = "okay";
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};
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&ifc {
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status = "okay";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x5 0x80000000 0x08000000
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0x2 0x0 0x5 0x30000000 0x00010000
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0x3 0x0 0x5 0x20000000 0x00010000>;
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x8000000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nand@2,0 {
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compatible = "fsl,ifc-nand";
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reg = <0x2 0x0 0x10000>;
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};
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boardctrl: board-control@3,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,ls208xaqds-fpga", "fsl,fpga-qixis", "simple-mfd";
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reg = <3 0 0x1000>;
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ranges = <0 3 0 0x1000>;
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mdio-mux-emi1@54 {
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compatible = "mdio-mux-mmioreg", "mdio-mux";
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mdio-parent-bus = <&emdio1>;
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reg = <0x54 1>; /* BRDCFG4 */
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mux-mask = <0xe0>; /* EMI1_MDIO */
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#address-cells=<1>;
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#size-cells = <0>;
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/* Child MDIO buses, one for each riser card:
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* reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
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* VSC8234 PHYs on the riser cards.
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*/
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mdio_mux3: mdio@60 {
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reg = <0x60>;
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#address-cells = <1>;
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#size-cells = <0>;
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mdio0_phy12: mdio-phy0@1c {
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reg = <0x1c>;
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};
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mdio0_phy13: mdio-phy1@1d {
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reg = <0x1d>;
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};
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mdio0_phy14: mdio-phy2@1e {
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reg = <0x1e>;
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};
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mdio0_phy15: mdio-phy3@1f {
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reg = <0x1f>;
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};
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};
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};
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};
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};
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&i2c0 {
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status = "okay";
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i2c-mux@77 {
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compatible = "nxp,pca9547";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00>;
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rtc@68 {
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compatible = "dallas,ds3232";
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reg = <0x68>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x02>;
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ina220@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <500>;
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};
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ina220@41 {
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compatible = "ti,ina220";
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reg = <0x41>;
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shunt-resistor = <1000>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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adt7481@4c {
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compatible = "adi,adt7461";
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reg = <0x4c>;
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};
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};
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};
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};
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&i2c1 {
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status = "disabled";
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};
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&i2c2 {
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status = "disabled";
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};
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&i2c3 {
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status = "disabled";
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};
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&dspi {
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status = "okay";
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dflash0: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <3000000>;
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reg = <0>;
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};
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dflash1: flash@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <3000000>;
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reg = <1>;
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};
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dflash2: flash@2 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <3000000>;
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reg = <2>;
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};
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};
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&qspi {
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status = "okay";
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flash0: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <0>;
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};
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flash2: flash@2 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <2>;
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};
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};
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&sata0 {
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status = "okay";
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};
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&sata1 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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