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linux-zen-desktop/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts

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Initial commit
2023-08-30 17:31:07 +02:00
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Device Tree file for LX2160A BLUEBOX3
//
// Copyright 2020-2021 NXP
/dts-v1/;
#include "fsl-lx2160a.dtsi"
/ {
model = "NXP Layerscape LX2160ABLUEBOX3";
compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
aliases {
crypto = &crypto;
mmc0 = &esdhc0;
mmc1 = &esdhc1;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
sb_3v3: regulator-sb3v3 {
compatible = "regulator-fixed";
regulator-name = "MC34717-3.3VSB";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&can0 {
status = "okay";
can-transceiver {
max-bitrate = <5000000>;
};
};
&can1 {
status = "okay";
can-transceiver {
max-bitrate = <5000000>;
};
};
&crypto {
status = "okay";
};
&dpmac5 {
phy-handle = <&aqr113c_phy1>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
&dpmac6 {
phy-handle = <&aqr113c_phy2>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
&dpmac9 {
phy-handle = <&aqr113c_phy3>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
&dpmac10 {
phy-handle = <&aqr113c_phy4>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
&dpmac17 {
phy-mode = "rgmii";
status = "okay";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&dpmac18 {
phy-mode = "rgmii";
status = "okay";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&emdio1 {
status = "okay";
aqr113c_phy2: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x0>;
/* IRQ_10G_PHY2 */
interrupts-extended = <&extirq 3 IRQ_TYPE_LEVEL_LOW>;
};
aqr113c_phy1: ethernet-phy@8 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x8>;
/* IRQ_10G_PHY1 */
interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
};
sw1_mii3_phy: ethernet-phy@5 {
/* AR8035 */
compatible = "ethernet-phy-id004d.d072";
reg = <0x5>;
interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>;
};
sw2_mii3_phy: ethernet-phy@6 {
/* AR8035 */
compatible = "ethernet-phy-id004d.d072";
reg = <0x6>;
interrupts-extended = <&extirq 7 IRQ_TYPE_LEVEL_LOW>;
};
};
&emdio2 {
status = "okay";
aqr113c_phy4: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x0>;
/* IRQ_10G_PHY4 */
interrupts-extended = <&extirq 5 IRQ_TYPE_LEVEL_LOW>;
};
aqr113c_phy3: ethernet-phy@8 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x8>;
/* IRQ_10G_PHY3 */
interrupts-extended = <&extirq 4 IRQ_TYPE_LEVEL_LOW>;
};
};
&esdhc0 {
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
status = "okay";
};
&esdhc1 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
status = "okay";
};
&fspi {
status = "okay";
mt35xu512aba0: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
m25p,fast-read;
spi-max-frequency = <50000000>;
spi-rx-bus-width = <8>;
spi-tx-bus-width = <8>;
};
mt35xu512aba1: flash@1 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <1>;
m25p,fast-read;
spi-max-frequency = <50000000>;
spi-rx-bus-width = <8>;
spi-tx-bus-width = <8>;
};
};
&i2c0 {
status = "okay";
i2c-mux@77 {
compatible = "nxp,pca9547";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
power-monitor@40 {
compatible = "ti,ina220";
reg = <0x40>;
shunt-resistor = <500>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
temp2: temperature-sensor@48 {
compatible = "nxp,sa56004";
reg = <0x48>;
vcc-supply = <&sb_3v3>;
#thermal-sensor-cells = <1>;
};
temp1: temperature-sensor@4c {
compatible = "nxp,sa56004";
reg = <0x4c>;
vcc-supply = <&sb_3v3>;
#thermal-sensor-cells = <1>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>;
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
interrupts-extended = <&extirq 11 IRQ_TYPE_LEVEL_LOW>;
};
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7>;
i2c-mux@75 {
compatible = "nxp,pca9547";
reg = <0x75>;
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
spi_bridge: spi@28 {
compatible = "nxp,sc18is602b";
reg = <0x28>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
};
};
};
&i2c5 {
status = "okay";
i2c-mux@77 {
compatible = "nxp,pca9846";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>;
/* The I2C multiplexer and temperature sensors are on
* the T6 riser card.
*/
i2c-mux@70 {
compatible = "nxp,pca9548";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x6>;
q12: temperature-sensor@4c {
compatible = "nxp,sa56004";
reg = <0x4c>;
vcc-supply = <&sb_3v3>;
#thermal-sensor-cells = <1>;
};
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7>;
q11: temperature-sensor@4c {
compatible = "nxp,sa56004";
reg = <0x4c>;
vcc-supply = <&sb_3v3>;
#thermal-sensor-cells = <1>;
};
q13: temperature-sensor@48 {
compatible = "nxp,sa56004";
reg = <0x48>;
vcc-supply = <&sb_3v3>;
#thermal-sensor-cells = <1>;
};
q14: temperature-sensor@4a {
compatible = "nxp,sa56004";
reg = <0x4a>;
vcc-supply = <&sb_3v3>;
#thermal-sensor-cells = <1>;
};
};
};
};
};
};
&pcs_mdio5 {
status = "okay";
};
&pcs_mdio6 {
status = "okay";
};
&pcs_mdio9 {
status = "okay";
};
&pcs_mdio10 {
status = "okay";
};
&spi_bridge {
sw1: ethernet-switch@0 {
compatible = "nxp,sja1110a";
reg = <0>;
spi-max-frequency = <4000000>;
spi-cpol;
dsa,member = <0 0>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
/* Microcontroller port */
port@0 {
reg = <0>;
status = "disabled";
};
/* SW1_P1 */
port@1 {
reg = <1>;
label = "con_2x20";
phy-mode = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@2 {
reg = <2>;
ethernet = <&dpmac17>;
phy-mode = "rgmii-id";
rx-internal-delay-ps = <2000>;
tx-internal-delay-ps = <2000>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@3 {
reg = <3>;
label = "1ge_p1";
phy-mode = "rgmii-id";
phy-handle = <&sw1_mii3_phy>;
};
sw1p4: port@4 {
reg = <4>;
link = <&sw2p1>;
phy-mode = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@5 {
reg = <5>;
label = "trx1";
phy-mode = "internal";
phy-handle = <&sw1_port5_base_t1_phy>;
};
port@6 {
reg = <6>;
label = "trx2";
phy-mode = "internal";
phy-handle = <&sw1_port6_base_t1_phy>;
};
port@7 {
reg = <7>;
label = "trx3";
phy-mode = "internal";
phy-handle = <&sw1_port7_base_t1_phy>;
};
port@8 {
reg = <8>;
label = "trx4";
phy-mode = "internal";
phy-handle = <&sw1_port8_base_t1_phy>;
};
port@9 {
reg = <9>;
label = "trx5";
phy-mode = "internal";
phy-handle = <&sw1_port9_base_t1_phy>;
};
port@a {
reg = <10>;
label = "trx6";
phy-mode = "internal";
phy-handle = <&sw1_port10_base_t1_phy>;
};
};
mdios {
#address-cells = <1>;
#size-cells = <0>;
mdio@0 {
compatible = "nxp,sja1110-base-t1-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
sw1_port5_base_t1_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x1>;
};
sw1_port6_base_t1_phy: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x2>;
};
sw1_port7_base_t1_phy: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x3>;
};
sw1_port8_base_t1_phy: ethernet-phy@4 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x4>;
};
sw1_port9_base_t1_phy: ethernet-phy@5 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x5>;
};
sw1_port10_base_t1_phy: ethernet-phy@6 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x6>;
};
};
};
};
sw2: ethernet-switch@2 {
compatible = "nxp,sja1110a";
reg = <2>;
spi-max-frequency = <4000000>;
spi-cpol;
dsa,member = <0 1>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
/* Microcontroller port */
port@0 {
reg = <0>;
status = "disabled";
};
sw2p1: port@1 {
reg = <1>;
link = <&sw1p4>;
phy-mode = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@2 {
reg = <2>;
ethernet = <&dpmac18>;
phy-mode = "rgmii-id";
rx-internal-delay-ps = <2000>;
tx-internal-delay-ps = <2000>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@3 {
reg = <3>;
label = "1ge_p2";
phy-mode = "rgmii-id";
phy-handle = <&sw2_mii3_phy>;
};
port@4 {
reg = <4>;
label = "to_sw3";
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
};
};
port@5 {
reg = <5>;
label = "trx7";
phy-mode = "internal";
phy-handle = <&sw2_port5_base_t1_phy>;
};
port@6 {
reg = <6>;
label = "trx8";
phy-mode = "internal";
phy-handle = <&sw2_port6_base_t1_phy>;
};
port@7 {
reg = <7>;
label = "trx9";
phy-mode = "internal";
phy-handle = <&sw2_port7_base_t1_phy>;
};
port@8 {
reg = <8>;
label = "trx10";
phy-mode = "internal";
phy-handle = <&sw2_port8_base_t1_phy>;
};
port@9 {
reg = <9>;
label = "trx11";
phy-mode = "internal";
phy-handle = <&sw2_port9_base_t1_phy>;
};
port@a {
reg = <10>;
label = "trx12";
phy-mode = "internal";
phy-handle = <&sw2_port10_base_t1_phy>;
};
};
mdios {
#address-cells = <1>;
#size-cells = <0>;
mdio@0 {
compatible = "nxp,sja1110-base-t1-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
sw2_port5_base_t1_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x1>;
};
sw2_port6_base_t1_phy: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x2>;
};
sw2_port7_base_t1_phy: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x3>;
};
sw2_port8_base_t1_phy: ethernet-phy@4 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x4>;
};
sw2_port9_base_t1_phy: ethernet-phy@5 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x5>;
};
sw2_port10_base_t1_phy: ethernet-phy@6 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x6>;
};
};
};
};
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};