451 lines
8.4 KiB
Plaintext
451 lines
8.4 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2021 MediaTek Inc.
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* Authors: Sam.Shih <sam.shih@mediatek.com>
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* Frank Wunderlich <frank-w@public-files.de>
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* Daniel Golle <daniel@makrotopia.org>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include "mt7986a.dtsi"
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/ {
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model = "Bananapi BPI-R3";
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compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
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aliases {
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serial0 = &uart0;
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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dcin: regulator-12vd {
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compatible = "regulator-fixed";
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regulator-name = "12vd";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset-key {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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wps-key {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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};
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};
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/* i2c of the left SFP cage (wan) */
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i2c_sfp1: i2c-gpio-0 {
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compatible = "i2c-gpio";
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sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/* i2c of the right SFP cage (lan) */
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i2c_sfp2: i2c-gpio-1 {
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compatible = "i2c-gpio";
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sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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leds {
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compatible = "gpio-leds";
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green_led: led-0 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
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gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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blue_led: led-1 {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 86 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1.8vd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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vin-supply = <&dcin>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3.3vd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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vin-supply = <&dcin>;
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};
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/* left SFP cage (wan) */
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sfp1: sfp-1 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c_sfp1>;
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los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
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mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
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tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
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tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
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};
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/* right SFP cage (lan) */
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sfp2: sfp-2 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c_sfp2>;
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los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
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mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
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tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
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tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
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};
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};
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&crypto {
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status = "okay";
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "2500base-x";
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sfp = <&sfp1>;
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managed = "in-band-status";
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&mdio {
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switch: switch@31 {
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compatible = "mediatek,mt7531";
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reg = <31>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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};
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};
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&mmc0 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins>;
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status = "okay";
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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status = "okay";
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};
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&pcie_phy {
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status = "okay";
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};
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&pio {
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i2c_pins: i2c-pins {
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mux {
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function = "i2c";
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groups = "i2c";
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};
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};
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mmc0_pins_default: mmc0-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
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};
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};
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mmc0_pins_uhs: mmc0-uhs-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
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};
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};
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pcie_pins: pcie-pins {
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mux {
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function = "pcie";
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groups = "pcie_clk", "pcie_pereset";
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};
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};
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spi_flash_pins: spi-flash-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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};
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spic_pins: spic-pins {
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mux {
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function = "spi";
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groups = "spi1_0";
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};
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};
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uart1_pins: uart1-pins {
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mux {
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function = "uart";
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groups = "uart1_rx_tx";
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};
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};
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uart2_pins: uart2-pins {
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mux {
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function = "uart";
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groups = "uart2_0_rx_tx";
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};
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};
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wf_2g_5g_pins: wf-2g-5g-pins {
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mux {
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function = "wifi";
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groups = "wf_2g", "wf_5g";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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wf_dbdc_pins: wf-dbdc-pins {
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mux {
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function = "wifi";
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groups = "wf_dbdc";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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wf_led_pins: wf-led-pins {
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mux {
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function = "led";
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groups = "wifi_led";
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_flash_pins>;
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status = "okay";
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spic_pins>;
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status = "okay";
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};
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&ssusb {
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status = "okay";
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "wan";
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};
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port@1 {
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reg = <1>;
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label = "lan0";
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};
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port@2 {
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reg = <2>;
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label = "lan1";
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};
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port@3 {
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reg = <3>;
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label = "lan2";
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};
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port@4 {
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reg = <4>;
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label = "lan3";
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};
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port5: port@5 {
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reg = <5>;
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label = "lan4";
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phy-mode = "2500base-x";
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sfp = <&sfp2>;
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managed = "in-band-status";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&trng {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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status = "okay";
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pinctrl-names = "default", "dbdc";
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pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
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pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
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};
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