581 lines
11 KiB
Plaintext
581 lines
11 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* dts file for Xilinx ZynqMP ZCU100 revC
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*
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* (C) Copyright 2016 - 2021, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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* Nathalie Chan King Choy
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*/
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/dts-v1/;
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#include "zynqmp.dtsi"
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#include "zynqmp-clk-ccf.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
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#include <dt-bindings/phy/phy.h>
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/ {
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model = "ZynqMP ZCU100 RevC";
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compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
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aliases {
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i2c0 = &i2c1;
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rtc0 = &rtc;
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serial0 = &uart1;
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serial1 = &uart0;
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serial2 = &dcc;
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spi0 = &spi0;
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spi1 = &spi1;
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usb0 = &usb0;
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usb1 = &usb1;
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mmc0 = &sdhci0;
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mmc1 = &sdhci1;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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autorepeat;
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switch-4 {
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label = "sw4";
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gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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wakeup-source;
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autorepeat;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-ds2 {
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label = "ds2";
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gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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led-ds3 {
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label = "ds3";
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gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0tx"; /* WLAN tx */
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default-state = "off";
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};
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led-ds4 {
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label = "ds4";
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gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0rx"; /* WLAN rx */
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default-state = "off";
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};
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led-ds5 {
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label = "ds5";
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gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "bluetooth-power";
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};
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led-vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
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label = "vbus_det";
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gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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wmmcsdio_fixed: fixedregulator-mmcsdio {
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compatible = "regulator-fixed";
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regulator-name = "wmmcsdio_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
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post-power-on-delay-ms = <10>;
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};
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ina226 {
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compatible = "iio-hwmon";
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io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
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};
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si5335_0: si5335_0 { /* clk0_usb - u23 */
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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};
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si5335_1: si5335_1 { /* clk1_dp - u23 */
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <27000000>;
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};
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};
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&dcc {
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status = "okay";
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};
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&gpio {
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status = "okay";
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gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
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"I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
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"SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
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"SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
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"PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
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"VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
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"DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
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"", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
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"GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
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"GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
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"SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
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"USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
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"USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
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"USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
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"USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
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"USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
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"", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "";
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};
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&i2c1 {
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status = "okay";
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
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clock-frequency = <100000>;
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i2c-mux@75 { /* u11 */
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x75>;
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i2csw_0: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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label = "LS-I2C0";
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};
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i2csw_1: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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label = "LS-I2C1";
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};
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i2csw_2: i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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label = "HS-I2C2";
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};
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i2csw_3: i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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label = "HS-I2C3";
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};
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i2csw_4: i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x4>;
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pmic: pmic@5e { /* Custom TI PMIC u33 */
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compatible = "ti,tps65086";
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reg = <0x5e>;
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interrupt-parent = <&gpio>;
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interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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};
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i2csw_5: i2c@5 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <5>;
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/* PS_PMBUS */
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u35: ina226@40 { /* u35 */
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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reg = <0x40>;
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shunt-resistor = <10000>;
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/* MIO31 is alert which should be routed to PMUFW */
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};
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};
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i2csw_6: i2c@6 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <6>;
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/*
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* Not Connected
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*/
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};
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i2csw_7: i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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/*
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* usb5744 (DNP) - U5
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* 100kHz - this is default freq for us
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*/
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};
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};
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};
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&pinctrl0 {
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status = "okay";
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pinctrl_i2c1_default: i2c1-default {
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mux {
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groups = "i2c1_1_grp";
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function = "i2c1";
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};
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conf {
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groups = "i2c1_1_grp";
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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};
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};
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pinctrl_i2c1_gpio: i2c1-gpio {
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mux {
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groups = "gpio0_4_grp", "gpio0_5_grp";
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function = "gpio0";
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};
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conf {
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groups = "gpio0_4_grp", "gpio0_5_grp";
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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};
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};
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pinctrl_sdhci0_default: sdhci0-default {
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mux {
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groups = "sdio0_3_grp";
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function = "sdio0";
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};
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conf {
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groups = "sdio0_3_grp";
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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bias-disable;
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};
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mux-cd {
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groups = "sdio0_cd_0_grp";
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function = "sdio0_cd";
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};
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conf-cd {
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groups = "sdio0_cd_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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};
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};
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pinctrl_sdhci1_default: sdhci1-default {
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mux {
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groups = "sdio1_2_grp";
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function = "sdio1";
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};
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conf {
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groups = "sdio1_2_grp";
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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bias-disable;
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};
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};
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pinctrl_spi0_default: spi0-default {
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mux {
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groups = "spi0_3_grp";
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function = "spi0";
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};
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conf {
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groups = "spi0_3_grp";
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bias-disable;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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};
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mux-cs {
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groups = "spi0_ss_9_grp";
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function = "spi0_ss";
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};
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conf-cs {
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groups = "spi0_ss_9_grp";
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bias-disable;
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};
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};
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pinctrl_spi1_default: spi1-default {
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mux {
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groups = "spi1_0_grp";
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function = "spi1";
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};
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conf {
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groups = "spi1_0_grp";
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bias-disable;
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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};
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mux-cs {
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groups = "spi1_ss_0_grp";
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function = "spi1_ss";
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};
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conf-cs {
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groups = "spi1_ss_0_grp";
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bias-disable;
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};
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};
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pinctrl_uart0_default: uart0-default {
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mux {
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groups = "uart0_0_grp";
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function = "uart0";
|
||
|
|
};
|
||
|
|
|
||
|
|
conf {
|
||
|
|
groups = "uart0_0_grp";
|
||
|
|
slew-rate = <SLEW_RATE_SLOW>;
|
||
|
|
power-source = <IO_STANDARD_LVCMOS18>;
|
||
|
|
};
|
||
|
|
|
||
|
|
conf-rx {
|
||
|
|
pins = "MIO3";
|
||
|
|
bias-high-impedance;
|
||
|
|
};
|
||
|
|
|
||
|
|
conf-tx {
|
||
|
|
pins = "MIO2";
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart1_default: uart1-default {
|
||
|
|
mux {
|
||
|
|
groups = "uart1_0_grp";
|
||
|
|
function = "uart1";
|
||
|
|
};
|
||
|
|
|
||
|
|
conf {
|
||
|
|
groups = "uart1_0_grp";
|
||
|
|
slew-rate = <SLEW_RATE_SLOW>;
|
||
|
|
power-source = <IO_STANDARD_LVCMOS18>;
|
||
|
|
};
|
||
|
|
|
||
|
|
conf-rx {
|
||
|
|
pins = "MIO1";
|
||
|
|
bias-high-impedance;
|
||
|
|
};
|
||
|
|
|
||
|
|
conf-tx {
|
||
|
|
pins = "MIO0";
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usb0_default: usb0-default {
|
||
|
|
mux {
|
||
|
|
groups = "usb0_0_grp";
|
||
|
|
function = "usb0";
|
||
|
|
};
|
||
|
|
|
||
|
|
conf {
|
||
|
|
groups = "usb0_0_grp";
|
||
|
|
slew-rate = <SLEW_RATE_SLOW>;
|
||
|
|
power-source = <IO_STANDARD_LVCMOS18>;
|
||
|
|
};
|
||
|
|
|
||
|
|
conf-rx {
|
||
|
|
pins = "MIO52", "MIO53", "MIO55";
|
||
|
|
bias-high-impedance;
|
||
|
|
};
|
||
|
|
|
||
|
|
conf-tx {
|
||
|
|
pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
|
||
|
|
"MIO60", "MIO61", "MIO62", "MIO63";
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usb1_default: usb1-default {
|
||
|
|
mux {
|
||
|
|
groups = "usb1_0_grp";
|
||
|
|
function = "usb1";
|
||
|
|
};
|
||
|
|
|
||
|
|
conf {
|
||
|
|
groups = "usb1_0_grp";
|
||
|
|
slew-rate = <SLEW_RATE_SLOW>;
|
||
|
|
power-source = <IO_STANDARD_LVCMOS18>;
|
||
|
|
};
|
||
|
|
|
||
|
|
conf-rx {
|
||
|
|
pins = "MIO64", "MIO65", "MIO67";
|
||
|
|
bias-high-impedance;
|
||
|
|
};
|
||
|
|
|
||
|
|
conf-tx {
|
||
|
|
pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
|
||
|
|
"MIO72", "MIO73", "MIO74", "MIO75";
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&psgtr {
|
||
|
|
status = "okay";
|
||
|
|
/* usb3, dp */
|
||
|
|
clocks = <&si5335_0>, <&si5335_1>;
|
||
|
|
clock-names = "ref0", "ref1";
|
||
|
|
};
|
||
|
|
|
||
|
|
&rtc {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
/* SD0 only supports 3.3V, no level shifter */
|
||
|
|
&sdhci0 {
|
||
|
|
status = "okay";
|
||
|
|
no-1-8-v;
|
||
|
|
disable-wp;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_sdhci0_default>;
|
||
|
|
xlnx,mio-bank = <0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&sdhci1 {
|
||
|
|
status = "okay";
|
||
|
|
bus-width = <0x4>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_sdhci1_default>;
|
||
|
|
xlnx,mio-bank = <0>;
|
||
|
|
non-removable;
|
||
|
|
disable-wp;
|
||
|
|
cap-power-off-card;
|
||
|
|
mmc-pwrseq = <&sdio_pwrseq>;
|
||
|
|
vqmmc-supply = <&wmmcsdio_fixed>;
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
wlcore: wifi@2 {
|
||
|
|
compatible = "ti,wl1831";
|
||
|
|
reg = <2>;
|
||
|
|
interrupt-parent = <&gpio>;
|
||
|
|
interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&spi0 { /* Low Speed connector */
|
||
|
|
status = "okay";
|
||
|
|
label = "LS-SPI0";
|
||
|
|
num-cs = <1>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_spi0_default>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&spi1 { /* High Speed connector */
|
||
|
|
status = "okay";
|
||
|
|
label = "HS-SPI1";
|
||
|
|
num-cs = <1>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_spi1_default>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart0 {
|
||
|
|
status = "okay";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_uart0_default>;
|
||
|
|
bluetooth {
|
||
|
|
compatible = "ti,wl1831-st";
|
||
|
|
enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart1 {
|
||
|
|
status = "okay";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_uart1_default>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* ULPI SMSC USB3320 */
|
||
|
|
&usb0 {
|
||
|
|
status = "okay";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_usb0_default>;
|
||
|
|
phy-names = "usb3-phy";
|
||
|
|
phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&dwc3_0 {
|
||
|
|
status = "okay";
|
||
|
|
dr_mode = "peripheral";
|
||
|
|
maximum-speed = "super-speed";
|
||
|
|
};
|
||
|
|
|
||
|
|
/* ULPI SMSC USB3320 */
|
||
|
|
&usb1 {
|
||
|
|
status = "okay";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_usb1_default>;
|
||
|
|
phy-names = "usb3-phy";
|
||
|
|
phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&dwc3_1 {
|
||
|
|
status = "okay";
|
||
|
|
dr_mode = "host";
|
||
|
|
maximum-speed = "super-speed";
|
||
|
|
};
|
||
|
|
|
||
|
|
&watchdog0 {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&zynqmp_dpdma {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&zynqmp_dpsub {
|
||
|
|
status = "okay";
|
||
|
|
phy-names = "dp-phy0", "dp-phy1";
|
||
|
|
phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
|
||
|
|
<&psgtr 0 PHY_TYPE_DP 1 1>;
|
||
|
|
};
|