133 lines
3.0 KiB
C
133 lines
3.0 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_ARCHRANDOM_H
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#define _ASM_ARCHRANDOM_H
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#include <linux/arm-smccc.h>
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#include <linux/bug.h>
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#include <linux/kernel.h>
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#include <linux/irqflags.h>
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#include <asm/cpufeature.h>
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#define ARM_SMCCC_TRNG_MIN_VERSION 0x10000UL
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extern bool smccc_trng_available;
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static inline bool __init smccc_probe_trng(void)
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{
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struct arm_smccc_res res;
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arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_VERSION, &res);
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if ((s32)res.a0 < 0)
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return false;
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return res.a0 >= ARM_SMCCC_TRNG_MIN_VERSION;
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}
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static inline bool __arm64_rndr(unsigned long *v)
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{
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bool ok;
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/*
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* Reads of RNDR set PSTATE.NZCV to 0b0000 on success,
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* and set PSTATE.NZCV to 0b0100 otherwise.
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*/
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asm volatile(
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__mrs_s("%0", SYS_RNDR_EL0) "\n"
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" cset %w1, ne\n"
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: "=r" (*v), "=r" (ok)
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:
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: "cc");
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return ok;
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}
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static inline bool __arm64_rndrrs(unsigned long *v)
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{
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bool ok;
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/*
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* Reads of RNDRRS set PSTATE.NZCV to 0b0000 on success,
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* and set PSTATE.NZCV to 0b0100 otherwise.
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*/
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asm volatile(
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__mrs_s("%0", SYS_RNDRRS_EL0) "\n"
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" cset %w1, ne\n"
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: "=r" (*v), "=r" (ok)
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:
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: "cc");
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return ok;
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}
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static __always_inline bool __cpu_has_rng(void)
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{
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if (unlikely(!system_capabilities_finalized() && !preemptible()))
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return this_cpu_has_cap(ARM64_HAS_RNG);
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return cpus_have_const_cap(ARM64_HAS_RNG);
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}
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static inline size_t __must_check arch_get_random_longs(unsigned long *v, size_t max_longs)
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{
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/*
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* Only support the generic interface after we have detected
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* the system wide capability, avoiding complexity with the
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* cpufeature code and with potential scheduling between CPUs
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* with and without the feature.
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*/
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if (max_longs && __cpu_has_rng() && __arm64_rndr(v))
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return 1;
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return 0;
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}
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static inline size_t __must_check arch_get_random_seed_longs(unsigned long *v, size_t max_longs)
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{
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if (!max_longs)
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return 0;
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/*
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* We prefer the SMCCC call, since its semantics (return actual
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* hardware backed entropy) is closer to the idea behind this
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* function here than what even the RNDRSS register provides
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* (the output of a pseudo RNG freshly seeded by a TRNG).
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*/
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if (smccc_trng_available) {
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struct arm_smccc_res res;
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max_longs = min_t(size_t, 3, max_longs);
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arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_RND64, max_longs * 64, &res);
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if ((int)res.a0 >= 0) {
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switch (max_longs) {
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case 3:
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*v++ = res.a1;
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fallthrough;
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case 2:
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*v++ = res.a2;
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fallthrough;
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case 1:
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*v++ = res.a3;
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break;
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}
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return max_longs;
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}
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}
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/*
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* RNDRRS is not backed by an entropy source but by a DRBG that is
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* reseeded after each invocation. This is not a 100% fit but good
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* enough to implement this API if no other entropy source exists.
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*/
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if (__cpu_has_rng() && __arm64_rndrrs(v))
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return 1;
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return 0;
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}
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static inline bool __init __early_cpu_has_rndr(void)
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{
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/* Open code as we run prior to the first call to cpufeature. */
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unsigned long ftr = read_sysreg_s(SYS_ID_AA64ISAR0_EL1);
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return (ftr >> ID_AA64ISAR0_EL1_RNDR_SHIFT) & 0xf;
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}
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#endif /* _ASM_ARCHRANDOM_H */
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