80 lines
1.7 KiB
C
80 lines
1.7 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_SCS_H
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#define _ASM_SCS_H
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#ifdef __ASSEMBLY__
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#include <asm/asm-offsets.h>
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#include <asm/sysreg.h>
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#ifdef CONFIG_SHADOW_CALL_STACK
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scs_sp .req x18
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.macro scs_load_current
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get_current_task scs_sp
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ldr scs_sp, [scs_sp, #TSK_TI_SCS_SP]
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.endm
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.macro scs_save tsk
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str scs_sp, [\tsk, #TSK_TI_SCS_SP]
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.endm
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#else
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.macro scs_load_current
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.endm
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.macro scs_save tsk
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.endm
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#endif /* CONFIG_SHADOW_CALL_STACK */
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#else
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#include <linux/scs.h>
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#include <asm/cpufeature.h>
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#ifdef CONFIG_UNWIND_PATCH_PAC_INTO_SCS
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static inline bool should_patch_pac_into_scs(void)
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{
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u64 reg;
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/*
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* We only enable the shadow call stack dynamically if we are running
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* on a system that does not implement PAC or BTI. PAC and SCS provide
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* roughly the same level of protection, and BTI relies on the PACIASP
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* instructions serving as landing pads, preventing us from patching
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* those instructions into something else.
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*/
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reg = read_sysreg_s(SYS_ID_AA64ISAR1_EL1);
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if (SYS_FIELD_GET(ID_AA64ISAR1_EL1, APA, reg) |
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SYS_FIELD_GET(ID_AA64ISAR1_EL1, API, reg))
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return false;
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reg = read_sysreg_s(SYS_ID_AA64ISAR2_EL1);
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if (SYS_FIELD_GET(ID_AA64ISAR2_EL1, APA3, reg))
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return false;
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if (IS_ENABLED(CONFIG_ARM64_BTI_KERNEL)) {
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reg = read_sysreg_s(SYS_ID_AA64PFR1_EL1);
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if (reg & (0xf << ID_AA64PFR1_EL1_BT_SHIFT))
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return false;
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}
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return true;
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}
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static inline void dynamic_scs_init(void)
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{
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if (should_patch_pac_into_scs()) {
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pr_info("Enabling dynamic shadow call stack\n");
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static_branch_enable(&dynamic_scs_enabled);
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}
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}
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#else
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static inline void dynamic_scs_init(void) {}
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#endif
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int scs_patch(const u8 eh_frame[], int size);
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#endif /* __ASSEMBLY __ */
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#endif /* _ASM_SCS_H */
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