613 lines
15 KiB
C
613 lines
15 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015, 2016 ARM Ltd.
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*/
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#include <linux/uaccess.h>
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#include <linux/interrupt.h>
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#include <linux/cpu.h>
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#include <linux/kvm_host.h>
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#include <kvm/arm_vgic.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_mmu.h>
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#include "vgic.h"
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/*
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* Initialization rules: there are multiple stages to the vgic
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* initialization, both for the distributor and the CPU interfaces. The basic
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* idea is that even though the VGIC is not functional or not requested from
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* user space, the critical path of the run loop can still call VGIC functions
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* that just won't do anything, without them having to check additional
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* initialization flags to ensure they don't look at uninitialized data
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* structures.
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*
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* Distributor:
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*
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* - kvm_vgic_early_init(): initialization of static data that doesn't
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* depend on any sizing information or emulation type. No allocation
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* is allowed there.
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*
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* - vgic_init(): allocation and initialization of the generic data
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* structures that depend on sizing information (number of CPUs,
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* number of interrupts). Also initializes the vcpu specific data
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* structures. Can be executed lazily for GICv2.
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*
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* CPU Interface:
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*
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* - kvm_vgic_vcpu_init(): initialization of static data that
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* doesn't depend on any sizing information or emulation type. No
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* allocation is allowed there.
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*/
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/* EARLY INIT */
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/**
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* kvm_vgic_early_init() - Initialize static VGIC VCPU data structures
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* @kvm: The VM whose VGIC districutor should be initialized
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*
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* Only do initialization of static structures that don't require any
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* allocation or sizing information from userspace. vgic_init() called
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* kvm_vgic_dist_init() which takes care of the rest.
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*/
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void kvm_vgic_early_init(struct kvm *kvm)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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INIT_LIST_HEAD(&dist->lpi_list_head);
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INIT_LIST_HEAD(&dist->lpi_translation_cache);
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raw_spin_lock_init(&dist->lpi_list_lock);
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}
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/* CREATION */
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/**
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* kvm_vgic_create: triggered by the instantiation of the VGIC device by
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* user space, either through the legacy KVM_CREATE_IRQCHIP ioctl (v2 only)
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* or through the generic KVM_CREATE_DEVICE API ioctl.
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* irqchip_in_kernel() tells you if this function succeeded or not.
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* @kvm: kvm struct pointer
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* @type: KVM_DEV_TYPE_ARM_VGIC_V[23]
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*/
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int kvm_vgic_create(struct kvm *kvm, u32 type)
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{
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struct kvm_vcpu *vcpu;
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unsigned long i;
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int ret;
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/*
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* This function is also called by the KVM_CREATE_IRQCHIP handler,
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* which had no chance yet to check the availability of the GICv2
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* emulation. So check this here again. KVM_CREATE_DEVICE does
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* the proper checks already.
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*/
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if (type == KVM_DEV_TYPE_ARM_VGIC_V2 &&
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!kvm_vgic_global_state.can_emulate_gicv2)
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return -ENODEV;
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/* Must be held to avoid race with vCPU creation */
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lockdep_assert_held(&kvm->lock);
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ret = -EBUSY;
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if (!lock_all_vcpus(kvm))
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return ret;
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mutex_lock(&kvm->arch.config_lock);
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if (irqchip_in_kernel(kvm)) {
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ret = -EEXIST;
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goto out_unlock;
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}
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kvm_for_each_vcpu(i, vcpu, kvm) {
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if (vcpu_has_run_once(vcpu))
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goto out_unlock;
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}
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ret = 0;
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if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
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kvm->max_vcpus = VGIC_V2_MAX_CPUS;
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else
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kvm->max_vcpus = VGIC_V3_MAX_CPUS;
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if (atomic_read(&kvm->online_vcpus) > kvm->max_vcpus) {
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ret = -E2BIG;
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goto out_unlock;
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}
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kvm->arch.vgic.in_kernel = true;
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kvm->arch.vgic.vgic_model = type;
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kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;
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if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
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kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;
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else
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INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);
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out_unlock:
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mutex_unlock(&kvm->arch.config_lock);
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unlock_all_vcpus(kvm);
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return ret;
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}
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/* INIT/DESTROY */
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/**
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* kvm_vgic_dist_init: initialize the dist data structures
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* @kvm: kvm struct pointer
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* @nr_spis: number of spis, frozen by caller
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*/
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static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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struct kvm_vcpu *vcpu0 = kvm_get_vcpu(kvm, 0);
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int i;
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dist->spis = kcalloc(nr_spis, sizeof(struct vgic_irq), GFP_KERNEL_ACCOUNT);
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if (!dist->spis)
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return -ENOMEM;
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/*
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* In the following code we do not take the irq struct lock since
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* no other action on irq structs can happen while the VGIC is
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* not initialized yet:
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* If someone wants to inject an interrupt or does a MMIO access, we
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* require prior initialization in case of a virtual GICv3 or trigger
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* initialization when using a virtual GICv2.
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*/
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for (i = 0; i < nr_spis; i++) {
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struct vgic_irq *irq = &dist->spis[i];
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irq->intid = i + VGIC_NR_PRIVATE_IRQS;
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INIT_LIST_HEAD(&irq->ap_list);
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raw_spin_lock_init(&irq->irq_lock);
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irq->vcpu = NULL;
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irq->target_vcpu = vcpu0;
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kref_init(&irq->refcount);
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switch (dist->vgic_model) {
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case KVM_DEV_TYPE_ARM_VGIC_V2:
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irq->targets = 0;
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irq->group = 0;
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break;
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case KVM_DEV_TYPE_ARM_VGIC_V3:
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irq->mpidr = 0;
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irq->group = 1;
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break;
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default:
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kfree(dist->spis);
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dist->spis = NULL;
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return -EINVAL;
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}
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}
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return 0;
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}
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/**
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* kvm_vgic_vcpu_init() - Initialize static VGIC VCPU data
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* structures and register VCPU-specific KVM iodevs
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*
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* @vcpu: pointer to the VCPU being created and initialized
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*
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* Only do initialization, but do not actually enable the
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* VGIC CPU interface
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*/
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int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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int ret = 0;
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int i;
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vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
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INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
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raw_spin_lock_init(&vgic_cpu->ap_list_lock);
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atomic_set(&vgic_cpu->vgic_v3.its_vpe.vlpi_count, 0);
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/*
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* Enable and configure all SGIs to be edge-triggered and
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* configure all PPIs as level-triggered.
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*/
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for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
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struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
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INIT_LIST_HEAD(&irq->ap_list);
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raw_spin_lock_init(&irq->irq_lock);
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irq->intid = i;
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irq->vcpu = NULL;
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irq->target_vcpu = vcpu;
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kref_init(&irq->refcount);
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if (vgic_irq_is_sgi(i)) {
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/* SGIs */
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irq->enabled = 1;
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irq->config = VGIC_CONFIG_EDGE;
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} else {
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/* PPIs */
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irq->config = VGIC_CONFIG_LEVEL;
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}
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}
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if (!irqchip_in_kernel(vcpu->kvm))
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return 0;
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/*
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* If we are creating a VCPU with a GICv3 we must also register the
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* KVM io device for the redistributor that belongs to this VCPU.
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*/
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if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
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mutex_lock(&vcpu->kvm->slots_lock);
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ret = vgic_register_redist_iodev(vcpu);
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mutex_unlock(&vcpu->kvm->slots_lock);
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}
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return ret;
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}
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static void kvm_vgic_vcpu_enable(struct kvm_vcpu *vcpu)
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{
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if (kvm_vgic_global_state.type == VGIC_V2)
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vgic_v2_enable(vcpu);
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else
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vgic_v3_enable(vcpu);
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}
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/*
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* vgic_init: allocates and initializes dist and vcpu data structures
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* depending on two dimensioning parameters:
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* - the number of spis
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* - the number of vcpus
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* The function is generally called when nr_spis has been explicitly set
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* by the guest through the KVM DEVICE API. If not nr_spis is set to 256.
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* vgic_initialized() returns true when this function has succeeded.
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*/
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int vgic_init(struct kvm *kvm)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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struct kvm_vcpu *vcpu;
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int ret = 0, i;
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unsigned long idx;
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lockdep_assert_held(&kvm->arch.config_lock);
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if (vgic_initialized(kvm))
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return 0;
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/* Are we also in the middle of creating a VCPU? */
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if (kvm->created_vcpus != atomic_read(&kvm->online_vcpus))
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return -EBUSY;
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/* freeze the number of spis */
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if (!dist->nr_spis)
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dist->nr_spis = VGIC_NR_IRQS_LEGACY - VGIC_NR_PRIVATE_IRQS;
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ret = kvm_vgic_dist_init(kvm, dist->nr_spis);
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if (ret)
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goto out;
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/* Initialize groups on CPUs created before the VGIC type was known */
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kvm_for_each_vcpu(idx, vcpu, kvm) {
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
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struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
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switch (dist->vgic_model) {
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case KVM_DEV_TYPE_ARM_VGIC_V3:
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irq->group = 1;
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irq->mpidr = kvm_vcpu_get_mpidr_aff(vcpu);
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break;
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case KVM_DEV_TYPE_ARM_VGIC_V2:
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irq->group = 0;
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irq->targets = 1U << idx;
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break;
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default:
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ret = -EINVAL;
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goto out;
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}
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}
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}
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if (vgic_has_its(kvm))
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vgic_lpi_translation_cache_init(kvm);
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/*
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* If we have GICv4.1 enabled, unconditionnaly request enable the
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* v4 support so that we get HW-accelerated vSGIs. Otherwise, only
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* enable it if we present a virtual ITS to the guest.
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*/
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if (vgic_supports_direct_msis(kvm)) {
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ret = vgic_v4_init(kvm);
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if (ret)
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goto out;
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}
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kvm_for_each_vcpu(idx, vcpu, kvm)
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kvm_vgic_vcpu_enable(vcpu);
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ret = kvm_vgic_setup_default_irq_routing(kvm);
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if (ret)
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goto out;
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vgic_debug_init(kvm);
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/*
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* If userspace didn't set the GIC implementation revision,
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* default to the latest and greatest. You know want it.
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*/
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if (!dist->implementation_rev)
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dist->implementation_rev = KVM_VGIC_IMP_REV_LATEST;
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dist->initialized = true;
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out:
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return ret;
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}
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static void kvm_vgic_dist_destroy(struct kvm *kvm)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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struct vgic_redist_region *rdreg, *next;
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dist->ready = false;
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dist->initialized = false;
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kfree(dist->spis);
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dist->spis = NULL;
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dist->nr_spis = 0;
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dist->vgic_dist_base = VGIC_ADDR_UNDEF;
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if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
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list_for_each_entry_safe(rdreg, next, &dist->rd_regions, list)
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vgic_v3_free_redist_region(rdreg);
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INIT_LIST_HEAD(&dist->rd_regions);
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} else {
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dist->vgic_cpu_base = VGIC_ADDR_UNDEF;
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}
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if (vgic_has_its(kvm))
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vgic_lpi_translation_cache_destroy(kvm);
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if (vgic_supports_direct_msis(kvm))
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vgic_v4_teardown(kvm);
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}
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void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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/*
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* Retire all pending LPIs on this vcpu anyway as we're
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* going to destroy it.
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*/
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vgic_flush_pending_lpis(vcpu);
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INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
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vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
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}
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static void __kvm_vgic_destroy(struct kvm *kvm)
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{
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struct kvm_vcpu *vcpu;
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unsigned long i;
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lockdep_assert_held(&kvm->arch.config_lock);
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vgic_debug_destroy(kvm);
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kvm_for_each_vcpu(i, vcpu, kvm)
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kvm_vgic_vcpu_destroy(vcpu);
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kvm_vgic_dist_destroy(kvm);
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}
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void kvm_vgic_destroy(struct kvm *kvm)
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{
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mutex_lock(&kvm->arch.config_lock);
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__kvm_vgic_destroy(kvm);
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mutex_unlock(&kvm->arch.config_lock);
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}
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/**
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* vgic_lazy_init: Lazy init is only allowed if the GIC exposed to the guest
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* is a GICv2. A GICv3 must be explicitly initialized by the guest using the
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* KVM_DEV_ARM_VGIC_GRP_CTRL KVM_DEVICE group.
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* @kvm: kvm struct pointer
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*/
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int vgic_lazy_init(struct kvm *kvm)
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{
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int ret = 0;
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if (unlikely(!vgic_initialized(kvm))) {
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/*
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||
|
* We only provide the automatic initialization of the VGIC
|
||
|
* for the legacy case of a GICv2. Any other type must
|
||
|
* be explicitly initialized once setup with the respective
|
||
|
* KVM device call.
|
||
|
*/
|
||
|
if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2)
|
||
|
return -EBUSY;
|
||
|
|
||
|
mutex_lock(&kvm->arch.config_lock);
|
||
|
ret = vgic_init(kvm);
|
||
|
mutex_unlock(&kvm->arch.config_lock);
|
||
|
}
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
/* RESOURCE MAPPING */
|
||
|
|
||
|
/**
|
||
|
* Map the MMIO regions depending on the VGIC model exposed to the guest
|
||
|
* called on the first VCPU run.
|
||
|
* Also map the virtual CPU interface into the VM.
|
||
|
* v2 calls vgic_init() if not already done.
|
||
|
* v3 and derivatives return an error if the VGIC is not initialized.
|
||
|
* vgic_ready() returns true if this function has succeeded.
|
||
|
* @kvm: kvm struct pointer
|
||
|
*/
|
||
|
int kvm_vgic_map_resources(struct kvm *kvm)
|
||
|
{
|
||
|
struct vgic_dist *dist = &kvm->arch.vgic;
|
||
|
gpa_t dist_base;
|
||
|
int ret = 0;
|
||
|
|
||
|
if (likely(vgic_ready(kvm)))
|
||
|
return 0;
|
||
|
|
||
|
mutex_lock(&kvm->slots_lock);
|
||
|
mutex_lock(&kvm->arch.config_lock);
|
||
|
if (vgic_ready(kvm))
|
||
|
goto out;
|
||
|
|
||
|
if (!irqchip_in_kernel(kvm))
|
||
|
goto out;
|
||
|
|
||
|
if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2)
|
||
|
ret = vgic_v2_map_resources(kvm);
|
||
|
else
|
||
|
ret = vgic_v3_map_resources(kvm);
|
||
|
|
||
|
if (ret) {
|
||
|
__kvm_vgic_destroy(kvm);
|
||
|
goto out;
|
||
|
}
|
||
|
dist->ready = true;
|
||
|
dist_base = dist->vgic_dist_base;
|
||
|
mutex_unlock(&kvm->arch.config_lock);
|
||
|
|
||
|
ret = vgic_register_dist_iodev(kvm, dist_base,
|
||
|
kvm_vgic_global_state.type);
|
||
|
if (ret) {
|
||
|
kvm_err("Unable to register VGIC dist MMIO regions\n");
|
||
|
kvm_vgic_destroy(kvm);
|
||
|
}
|
||
|
mutex_unlock(&kvm->slots_lock);
|
||
|
return ret;
|
||
|
|
||
|
out:
|
||
|
mutex_unlock(&kvm->arch.config_lock);
|
||
|
mutex_unlock(&kvm->slots_lock);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
/* GENERIC PROBE */
|
||
|
|
||
|
void kvm_vgic_cpu_up(void)
|
||
|
{
|
||
|
enable_percpu_irq(kvm_vgic_global_state.maint_irq, 0);
|
||
|
}
|
||
|
|
||
|
|
||
|
void kvm_vgic_cpu_down(void)
|
||
|
{
|
||
|
disable_percpu_irq(kvm_vgic_global_state.maint_irq);
|
||
|
}
|
||
|
|
||
|
static irqreturn_t vgic_maintenance_handler(int irq, void *data)
|
||
|
{
|
||
|
/*
|
||
|
* We cannot rely on the vgic maintenance interrupt to be
|
||
|
* delivered synchronously. This means we can only use it to
|
||
|
* exit the VM, and we perform the handling of EOIed
|
||
|
* interrupts on the exit path (see vgic_fold_lr_state).
|
||
|
*/
|
||
|
return IRQ_HANDLED;
|
||
|
}
|
||
|
|
||
|
static struct gic_kvm_info *gic_kvm_info;
|
||
|
|
||
|
void __init vgic_set_kvm_info(const struct gic_kvm_info *info)
|
||
|
{
|
||
|
BUG_ON(gic_kvm_info != NULL);
|
||
|
gic_kvm_info = kmalloc(sizeof(*info), GFP_KERNEL);
|
||
|
if (gic_kvm_info)
|
||
|
*gic_kvm_info = *info;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* kvm_vgic_init_cpu_hardware - initialize the GIC VE hardware
|
||
|
*
|
||
|
* For a specific CPU, initialize the GIC VE hardware.
|
||
|
*/
|
||
|
void kvm_vgic_init_cpu_hardware(void)
|
||
|
{
|
||
|
BUG_ON(preemptible());
|
||
|
|
||
|
/*
|
||
|
* We want to make sure the list registers start out clear so that we
|
||
|
* only have the program the used registers.
|
||
|
*/
|
||
|
if (kvm_vgic_global_state.type == VGIC_V2)
|
||
|
vgic_v2_init_lrs();
|
||
|
else
|
||
|
kvm_call_hyp(__vgic_v3_init_lrs);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* kvm_vgic_hyp_init: populates the kvm_vgic_global_state variable
|
||
|
* according to the host GIC model. Accordingly calls either
|
||
|
* vgic_v2/v3_probe which registers the KVM_DEVICE that can be
|
||
|
* instantiated by a guest later on .
|
||
|
*/
|
||
|
int kvm_vgic_hyp_init(void)
|
||
|
{
|
||
|
bool has_mask;
|
||
|
int ret;
|
||
|
|
||
|
if (!gic_kvm_info)
|
||
|
return -ENODEV;
|
||
|
|
||
|
has_mask = !gic_kvm_info->no_maint_irq_mask;
|
||
|
|
||
|
if (has_mask && !gic_kvm_info->maint_irq) {
|
||
|
kvm_err("No vgic maintenance irq\n");
|
||
|
return -ENXIO;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* If we get one of these oddball non-GICs, taint the kernel,
|
||
|
* as we have no idea of how they *really* behave.
|
||
|
*/
|
||
|
if (gic_kvm_info->no_hw_deactivation) {
|
||
|
kvm_info("Non-architectural vgic, tainting kernel\n");
|
||
|
add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
|
||
|
kvm_vgic_global_state.no_hw_deactivation = true;
|
||
|
}
|
||
|
|
||
|
switch (gic_kvm_info->type) {
|
||
|
case GIC_V2:
|
||
|
ret = vgic_v2_probe(gic_kvm_info);
|
||
|
break;
|
||
|
case GIC_V3:
|
||
|
ret = vgic_v3_probe(gic_kvm_info);
|
||
|
if (!ret) {
|
||
|
static_branch_enable(&kvm_vgic_global_state.gicv3_cpuif);
|
||
|
kvm_info("GIC system register CPU interface enabled\n");
|
||
|
}
|
||
|
break;
|
||
|
default:
|
||
|
ret = -ENODEV;
|
||
|
}
|
||
|
|
||
|
kvm_vgic_global_state.maint_irq = gic_kvm_info->maint_irq;
|
||
|
|
||
|
kfree(gic_kvm_info);
|
||
|
gic_kvm_info = NULL;
|
||
|
|
||
|
if (ret)
|
||
|
return ret;
|
||
|
|
||
|
if (!has_mask && !kvm_vgic_global_state.maint_irq)
|
||
|
return 0;
|
||
|
|
||
|
ret = request_percpu_irq(kvm_vgic_global_state.maint_irq,
|
||
|
vgic_maintenance_handler,
|
||
|
"vgic", kvm_get_running_vcpus());
|
||
|
if (ret) {
|
||
|
kvm_err("Cannot register interrupt %d\n",
|
||
|
kvm_vgic_global_state.maint_irq);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
kvm_info("vgic interrupt IRQ%d\n", kvm_vgic_global_state.maint_irq);
|
||
|
return 0;
|
||
|
}
|