453 lines
9.6 KiB
C
453 lines
9.6 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu, <yu.liu@freescale.com>
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*
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* Description:
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* This file is derived from arch/powerpc/kvm/44x_emulate.c,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*/
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#include <asm/kvm_ppc.h>
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#include <asm/disassemble.h>
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#include <asm/dbell.h>
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#include <asm/reg_booke.h>
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#include "booke.h"
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#include "e500.h"
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#define XOP_DCBTLS 166
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#define XOP_MSGSND 206
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#define XOP_MSGCLR 238
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#define XOP_MFTMR 366
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#define XOP_TLBIVAX 786
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#define XOP_TLBSX 914
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#define XOP_TLBRE 946
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#define XOP_TLBWE 978
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#define XOP_TLBILX 18
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#define XOP_EHPRIV 270
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#ifdef CONFIG_KVM_E500MC
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static int dbell2prio(ulong param)
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{
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int msg = param & PPC_DBELL_TYPE_MASK;
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int prio = -1;
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switch (msg) {
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case PPC_DBELL_TYPE(PPC_DBELL):
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prio = BOOKE_IRQPRIO_DBELL;
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break;
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case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
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prio = BOOKE_IRQPRIO_DBELL_CRIT;
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break;
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default:
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break;
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}
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return prio;
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}
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static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
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{
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ulong param = vcpu->arch.regs.gpr[rb];
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int prio = dbell2prio(param);
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if (prio < 0)
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return EMULATE_FAIL;
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clear_bit(prio, &vcpu->arch.pending_exceptions);
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return EMULATE_DONE;
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}
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static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
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{
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ulong param = vcpu->arch.regs.gpr[rb];
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int prio = dbell2prio(rb);
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int pir = param & PPC_DBELL_PIR_MASK;
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unsigned long i;
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struct kvm_vcpu *cvcpu;
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if (prio < 0)
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return EMULATE_FAIL;
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kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
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int cpir = cvcpu->arch.shared->pir;
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if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
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set_bit(prio, &cvcpu->arch.pending_exceptions);
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kvm_vcpu_kick(cvcpu);
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}
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}
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return EMULATE_DONE;
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}
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#endif
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static int kvmppc_e500_emul_ehpriv(struct kvm_vcpu *vcpu,
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unsigned int inst, int *advance)
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{
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int emulated = EMULATE_DONE;
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switch (get_oc(inst)) {
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case EHPRIV_OC_DEBUG:
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vcpu->run->exit_reason = KVM_EXIT_DEBUG;
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vcpu->run->debug.arch.address = vcpu->arch.regs.nip;
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vcpu->run->debug.arch.status = 0;
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kvmppc_account_exit(vcpu, DEBUG_EXITS);
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emulated = EMULATE_EXIT_USER;
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*advance = 0;
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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return emulated;
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}
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static int kvmppc_e500_emul_dcbtls(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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/* Always fail to lock the cache */
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vcpu_e500->l1csr0 |= L1CSR0_CUL;
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return EMULATE_DONE;
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}
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static int kvmppc_e500_emul_mftmr(struct kvm_vcpu *vcpu, unsigned int inst,
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int rt)
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{
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/* Expose one thread per vcpu */
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if (get_tmrn(inst) == TMRN_TMCFG0) {
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kvmppc_set_gpr(vcpu, rt,
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1 | (1 << TMRN_TMCFG0_NATHRD_SHIFT));
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return EMULATE_DONE;
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}
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return EMULATE_FAIL;
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}
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int kvmppc_core_emulate_op_e500(struct kvm_vcpu *vcpu,
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unsigned int inst, int *advance)
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{
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int emulated = EMULATE_DONE;
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int ra = get_ra(inst);
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int rb = get_rb(inst);
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int rt = get_rt(inst);
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gva_t ea;
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switch (get_op(inst)) {
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case 31:
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switch (get_xop(inst)) {
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case XOP_DCBTLS:
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emulated = kvmppc_e500_emul_dcbtls(vcpu);
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break;
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#ifdef CONFIG_KVM_E500MC
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case XOP_MSGSND:
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emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
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break;
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case XOP_MSGCLR:
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emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
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break;
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#endif
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case XOP_TLBRE:
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emulated = kvmppc_e500_emul_tlbre(vcpu);
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break;
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case XOP_TLBWE:
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emulated = kvmppc_e500_emul_tlbwe(vcpu);
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break;
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case XOP_TLBSX:
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ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
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emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
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break;
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case XOP_TLBILX: {
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int type = rt & 0x3;
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ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
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emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
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break;
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}
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case XOP_TLBIVAX:
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ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
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emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
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break;
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case XOP_MFTMR:
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emulated = kvmppc_e500_emul_mftmr(vcpu, inst, rt);
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break;
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case XOP_EHPRIV:
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emulated = kvmppc_e500_emul_ehpriv(vcpu, inst, advance);
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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if (emulated == EMULATE_FAIL)
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emulated = kvmppc_booke_emulate_op(vcpu, inst, advance);
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return emulated;
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}
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int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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int emulated = EMULATE_DONE;
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switch (sprn) {
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#ifndef CONFIG_KVM_BOOKE_HV
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case SPRN_PID:
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kvmppc_set_pid(vcpu, spr_val);
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break;
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case SPRN_PID1:
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if (spr_val != 0)
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return EMULATE_FAIL;
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vcpu_e500->pid[1] = spr_val;
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break;
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case SPRN_PID2:
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if (spr_val != 0)
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return EMULATE_FAIL;
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vcpu_e500->pid[2] = spr_val;
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break;
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case SPRN_MAS0:
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vcpu->arch.shared->mas0 = spr_val;
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break;
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case SPRN_MAS1:
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vcpu->arch.shared->mas1 = spr_val;
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break;
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case SPRN_MAS2:
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vcpu->arch.shared->mas2 = spr_val;
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break;
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case SPRN_MAS3:
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vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
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vcpu->arch.shared->mas7_3 |= spr_val;
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break;
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case SPRN_MAS4:
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vcpu->arch.shared->mas4 = spr_val;
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break;
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case SPRN_MAS6:
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vcpu->arch.shared->mas6 = spr_val;
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break;
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case SPRN_MAS7:
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vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
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vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
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break;
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#endif
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case SPRN_L1CSR0:
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vcpu_e500->l1csr0 = spr_val;
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vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
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break;
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case SPRN_L1CSR1:
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vcpu_e500->l1csr1 = spr_val;
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vcpu_e500->l1csr1 &= ~(L1CSR1_ICFI | L1CSR1_ICLFR);
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break;
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case SPRN_HID0:
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vcpu_e500->hid0 = spr_val;
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break;
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case SPRN_HID1:
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vcpu_e500->hid1 = spr_val;
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break;
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case SPRN_MMUCSR0:
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emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
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spr_val);
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break;
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case SPRN_PWRMGTCR0:
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/*
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* Guest relies on host power management configurations
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* Treat the request as a general store
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*/
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vcpu->arch.pwrmgtcr0 = spr_val;
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break;
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case SPRN_BUCSR:
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/*
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* If we are here, it means that we have already flushed the
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* branch predictor, so just return to guest.
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*/
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break;
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/* extra exceptions */
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#ifdef CONFIG_SPE_POSSIBLE
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case SPRN_IVOR32:
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vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
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break;
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case SPRN_IVOR33:
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vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
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break;
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case SPRN_IVOR34:
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vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
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break;
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#endif
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#ifdef CONFIG_ALTIVEC
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case SPRN_IVOR32:
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vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] = spr_val;
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break;
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case SPRN_IVOR33:
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vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] = spr_val;
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break;
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#endif
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case SPRN_IVOR35:
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vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
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break;
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#ifdef CONFIG_KVM_BOOKE_HV
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case SPRN_IVOR36:
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vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
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break;
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case SPRN_IVOR37:
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vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
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break;
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#endif
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default:
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emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
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}
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return emulated;
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}
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int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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int emulated = EMULATE_DONE;
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switch (sprn) {
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#ifndef CONFIG_KVM_BOOKE_HV
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case SPRN_PID:
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*spr_val = vcpu_e500->pid[0];
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break;
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case SPRN_PID1:
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*spr_val = vcpu_e500->pid[1];
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break;
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case SPRN_PID2:
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*spr_val = vcpu_e500->pid[2];
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break;
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case SPRN_MAS0:
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*spr_val = vcpu->arch.shared->mas0;
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break;
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case SPRN_MAS1:
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*spr_val = vcpu->arch.shared->mas1;
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break;
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case SPRN_MAS2:
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*spr_val = vcpu->arch.shared->mas2;
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break;
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case SPRN_MAS3:
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*spr_val = (u32)vcpu->arch.shared->mas7_3;
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break;
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case SPRN_MAS4:
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*spr_val = vcpu->arch.shared->mas4;
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break;
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case SPRN_MAS6:
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*spr_val = vcpu->arch.shared->mas6;
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break;
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case SPRN_MAS7:
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*spr_val = vcpu->arch.shared->mas7_3 >> 32;
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break;
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#endif
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case SPRN_DECAR:
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*spr_val = vcpu->arch.decar;
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break;
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case SPRN_TLB0CFG:
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*spr_val = vcpu->arch.tlbcfg[0];
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break;
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case SPRN_TLB1CFG:
|
||
|
|
*spr_val = vcpu->arch.tlbcfg[1];
|
||
|
|
break;
|
||
|
|
case SPRN_TLB0PS:
|
||
|
|
if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
|
||
|
|
return EMULATE_FAIL;
|
||
|
|
*spr_val = vcpu->arch.tlbps[0];
|
||
|
|
break;
|
||
|
|
case SPRN_TLB1PS:
|
||
|
|
if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
|
||
|
|
return EMULATE_FAIL;
|
||
|
|
*spr_val = vcpu->arch.tlbps[1];
|
||
|
|
break;
|
||
|
|
case SPRN_L1CSR0:
|
||
|
|
*spr_val = vcpu_e500->l1csr0;
|
||
|
|
break;
|
||
|
|
case SPRN_L1CSR1:
|
||
|
|
*spr_val = vcpu_e500->l1csr1;
|
||
|
|
break;
|
||
|
|
case SPRN_HID0:
|
||
|
|
*spr_val = vcpu_e500->hid0;
|
||
|
|
break;
|
||
|
|
case SPRN_HID1:
|
||
|
|
*spr_val = vcpu_e500->hid1;
|
||
|
|
break;
|
||
|
|
case SPRN_SVR:
|
||
|
|
*spr_val = vcpu_e500->svr;
|
||
|
|
break;
|
||
|
|
|
||
|
|
case SPRN_MMUCSR0:
|
||
|
|
*spr_val = 0;
|
||
|
|
break;
|
||
|
|
|
||
|
|
case SPRN_MMUCFG:
|
||
|
|
*spr_val = vcpu->arch.mmucfg;
|
||
|
|
break;
|
||
|
|
case SPRN_EPTCFG:
|
||
|
|
if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
|
||
|
|
return EMULATE_FAIL;
|
||
|
|
/*
|
||
|
|
* Legacy Linux guests access EPTCFG register even if the E.PT
|
||
|
|
* category is disabled in the VM. Give them a chance to live.
|
||
|
|
*/
|
||
|
|
*spr_val = vcpu->arch.eptcfg;
|
||
|
|
break;
|
||
|
|
|
||
|
|
case SPRN_PWRMGTCR0:
|
||
|
|
*spr_val = vcpu->arch.pwrmgtcr0;
|
||
|
|
break;
|
||
|
|
|
||
|
|
/* extra exceptions */
|
||
|
|
#ifdef CONFIG_SPE_POSSIBLE
|
||
|
|
case SPRN_IVOR32:
|
||
|
|
*spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
|
||
|
|
break;
|
||
|
|
case SPRN_IVOR33:
|
||
|
|
*spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
|
||
|
|
break;
|
||
|
|
case SPRN_IVOR34:
|
||
|
|
*spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
|
||
|
|
break;
|
||
|
|
#endif
|
||
|
|
#ifdef CONFIG_ALTIVEC
|
||
|
|
case SPRN_IVOR32:
|
||
|
|
*spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL];
|
||
|
|
break;
|
||
|
|
case SPRN_IVOR33:
|
||
|
|
*spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST];
|
||
|
|
break;
|
||
|
|
#endif
|
||
|
|
case SPRN_IVOR35:
|
||
|
|
*spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
|
||
|
|
break;
|
||
|
|
#ifdef CONFIG_KVM_BOOKE_HV
|
||
|
|
case SPRN_IVOR36:
|
||
|
|
*spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
|
||
|
|
break;
|
||
|
|
case SPRN_IVOR37:
|
||
|
|
*spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
|
||
|
|
break;
|
||
|
|
#endif
|
||
|
|
default:
|
||
|
|
emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
|
||
|
|
}
|
||
|
|
|
||
|
|
return emulated;
|
||
|
|
}
|
||
|
|
|