183 lines
5.0 KiB
C
183 lines
5.0 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Declarations of procedures and variables shared between files
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* in arch/ppc/mm/.
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*
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* Derived from arch/ppc/mm/init.c:
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*/
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#include <linux/mm.h>
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#include <asm/mmu.h>
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#ifdef CONFIG_PPC_MMU_NOHASH
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#include <asm/trace.h>
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/*
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* On 40x and 8xx, we directly inline tlbia and tlbivax
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*/
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#if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx)
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static inline void _tlbil_all(void)
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{
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asm volatile ("sync; tlbia; isync" : : : "memory");
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trace_tlbia(MMU_NO_CONTEXT);
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}
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static inline void _tlbil_pid(unsigned int pid)
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{
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asm volatile ("sync; tlbia; isync" : : : "memory");
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trace_tlbia(pid);
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}
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#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
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#else /* CONFIG_40x || CONFIG_PPC_8xx */
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extern void _tlbil_all(void);
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extern void _tlbil_pid(unsigned int pid);
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#ifdef CONFIG_PPC_BOOK3E_64
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extern void _tlbil_pid_noind(unsigned int pid);
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#else
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#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
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#endif
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#endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */
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/*
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* On 8xx, we directly inline tlbie, on others, it's extern
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*/
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#ifdef CONFIG_PPC_8xx
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static inline void _tlbil_va(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind)
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{
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asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
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trace_tlbie(0, 0, address, pid, 0, 0, 0);
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}
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#elif defined(CONFIG_PPC_BOOK3E_64)
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extern void _tlbil_va(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind);
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#else
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extern void __tlbil_va(unsigned long address, unsigned int pid);
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static inline void _tlbil_va(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind)
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{
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__tlbil_va(address, pid);
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}
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#endif /* CONFIG_PPC_8xx */
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#if defined(CONFIG_PPC_BOOK3E_64) || defined(CONFIG_PPC_47x)
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extern void _tlbivax_bcast(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind);
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#else
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static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind)
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{
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BUG();
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}
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#endif
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static inline void print_system_hash_info(void) {}
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#else /* CONFIG_PPC_MMU_NOHASH */
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void print_system_hash_info(void);
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#endif /* CONFIG_PPC_MMU_NOHASH */
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#ifdef CONFIG_PPC32
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extern void mapin_ram(void);
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extern void setbat(int index, unsigned long virt, phys_addr_t phys,
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unsigned int size, pgprot_t prot);
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extern u8 early_hash[];
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#endif /* CONFIG_PPC32 */
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extern unsigned long __max_low_memory;
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extern phys_addr_t total_memory;
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extern phys_addr_t total_lowmem;
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extern phys_addr_t memstart_addr;
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extern phys_addr_t lowmem_end_addr;
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/* ...and now those things that may be slightly different between processor
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* architectures. -- Dan
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*/
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#ifdef CONFIG_PPC32
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extern void MMU_init_hw(void);
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void MMU_init_hw_patch(void);
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unsigned long mmu_mapin_ram(unsigned long base, unsigned long top);
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#endif
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#ifdef CONFIG_PPC_E500
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extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
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bool dryrun, bool init);
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#ifdef CONFIG_PPC32
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extern void adjust_total_lowmem(void);
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extern int switch_to_as1(void);
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extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
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void create_kaslr_tlb_entry(int entry, unsigned long virt, phys_addr_t phys);
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void reloc_kernel_entry(void *fdt, int addr);
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void relocate_init(u64 dt_ptr, phys_addr_t start);
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extern int is_second_reloc;
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#endif
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extern void loadcam_entry(unsigned int index);
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extern void loadcam_multi(int first_idx, int num, int tmp_idx);
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#ifdef CONFIG_RANDOMIZE_BASE
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void kaslr_early_init(void *dt_ptr, phys_addr_t size);
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void kaslr_late_init(void);
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#else
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static inline void kaslr_early_init(void *dt_ptr, phys_addr_t size) {}
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static inline void kaslr_late_init(void) {}
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#endif
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struct tlbcam {
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u32 MAS0;
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u32 MAS1;
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unsigned long MAS2;
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u32 MAS3;
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u32 MAS7;
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};
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#define NUM_TLBCAMS 64
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extern struct tlbcam TLBCAM[NUM_TLBCAMS];
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#endif
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#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_8xx)
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/* 6xx have BATS */
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/* PPC_85xx have TLBCAM */
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/* 8xx have LTLB */
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phys_addr_t v_block_mapped(unsigned long va);
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unsigned long p_block_mapped(phys_addr_t pa);
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#else
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static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
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static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
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#endif
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#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC_E500)
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void mmu_mark_initmem_nx(void);
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void mmu_mark_rodata_ro(void);
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#else
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static inline void mmu_mark_initmem_nx(void) { }
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static inline void mmu_mark_rodata_ro(void) { }
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#endif
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#ifdef CONFIG_PPC_8xx
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void __init mmu_mapin_immr(void);
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#endif
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#ifdef CONFIG_DEBUG_WX
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void ptdump_check_wx(void);
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#else
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static inline void ptdump_check_wx(void) { }
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#endif
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static inline bool debug_pagealloc_enabled_or_kfence(void)
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{
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return IS_ENABLED(CONFIG_KFENCE) || debug_pagealloc_enabled();
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}
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