431 lines
10 KiB
C
431 lines
10 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* TCE helpers for IODA PCI/PCIe on PowerNV platforms
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*
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* Copyright 2018 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/iommu.h>
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#include <asm/iommu.h>
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#include <asm/tce.h>
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#include "pci.h"
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unsigned long pnv_ioda_parse_tce_sizes(struct pnv_phb *phb)
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{
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struct pci_controller *hose = phb->hose;
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struct device_node *dn = hose->dn;
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unsigned long mask = 0;
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int i, rc, count;
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u32 val;
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count = of_property_count_u32_elems(dn, "ibm,supported-tce-sizes");
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if (count <= 0) {
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mask = SZ_4K | SZ_64K;
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/* Add 16M for POWER8 by default */
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if (cpu_has_feature(CPU_FTR_ARCH_207S) &&
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!cpu_has_feature(CPU_FTR_ARCH_300))
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mask |= SZ_16M | SZ_256M;
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return mask;
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}
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for (i = 0; i < count; i++) {
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rc = of_property_read_u32_index(dn, "ibm,supported-tce-sizes",
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i, &val);
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if (rc == 0)
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mask |= 1ULL << val;
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}
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return mask;
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}
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void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
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void *tce_mem, u64 tce_size,
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u64 dma_offset, unsigned int page_shift)
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{
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tbl->it_blocksize = 16;
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tbl->it_base = (unsigned long)tce_mem;
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tbl->it_page_shift = page_shift;
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tbl->it_offset = dma_offset >> tbl->it_page_shift;
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tbl->it_index = 0;
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tbl->it_size = tce_size >> 3;
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tbl->it_busno = 0;
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tbl->it_type = TCE_PCI;
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}
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static __be64 *pnv_alloc_tce_level(int nid, unsigned int shift)
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{
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struct page *tce_mem = NULL;
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__be64 *addr;
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tce_mem = alloc_pages_node(nid, GFP_ATOMIC | __GFP_NOWARN,
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shift - PAGE_SHIFT);
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if (!tce_mem) {
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pr_err("Failed to allocate a TCE memory, level shift=%d\n",
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shift);
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return NULL;
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}
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addr = page_address(tce_mem);
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memset(addr, 0, 1UL << shift);
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return addr;
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}
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static void pnv_pci_ioda2_table_do_free_pages(__be64 *addr,
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unsigned long size, unsigned int levels);
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static __be64 *pnv_tce(struct iommu_table *tbl, bool user, long idx, bool alloc)
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{
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__be64 *tmp = user ? tbl->it_userspace : (__be64 *) tbl->it_base;
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int level = tbl->it_indirect_levels;
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const long shift = ilog2(tbl->it_level_size);
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unsigned long mask = (tbl->it_level_size - 1) << (level * shift);
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while (level) {
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int n = (idx & mask) >> (level * shift);
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unsigned long oldtce, tce = be64_to_cpu(READ_ONCE(tmp[n]));
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if (!tce) {
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__be64 *tmp2;
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if (!alloc)
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return NULL;
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tmp2 = pnv_alloc_tce_level(tbl->it_nid,
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ilog2(tbl->it_level_size) + 3);
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if (!tmp2)
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return NULL;
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tce = __pa(tmp2) | TCE_PCI_READ | TCE_PCI_WRITE;
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oldtce = be64_to_cpu(cmpxchg(&tmp[n], 0,
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cpu_to_be64(tce)));
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if (oldtce) {
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pnv_pci_ioda2_table_do_free_pages(tmp2,
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ilog2(tbl->it_level_size) + 3, 1);
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tce = oldtce;
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}
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}
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tmp = __va(tce & ~(TCE_PCI_READ | TCE_PCI_WRITE));
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idx &= ~mask;
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mask >>= shift;
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--level;
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}
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return tmp + idx;
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}
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int pnv_tce_build(struct iommu_table *tbl, long index, long npages,
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unsigned long uaddr, enum dma_data_direction direction,
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unsigned long attrs)
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{
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u64 proto_tce = iommu_direction_to_tce_perm(direction);
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u64 rpn = __pa(uaddr) >> tbl->it_page_shift;
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long i;
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if (proto_tce & TCE_PCI_WRITE)
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proto_tce |= TCE_PCI_READ;
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for (i = 0; i < npages; i++) {
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unsigned long newtce = proto_tce |
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((rpn + i) << tbl->it_page_shift);
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unsigned long idx = index - tbl->it_offset + i;
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*(pnv_tce(tbl, false, idx, true)) = cpu_to_be64(newtce);
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}
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return 0;
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}
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#ifdef CONFIG_IOMMU_API
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int pnv_tce_xchg(struct iommu_table *tbl, long index,
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unsigned long *hpa, enum dma_data_direction *direction)
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{
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u64 proto_tce = iommu_direction_to_tce_perm(*direction);
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unsigned long newtce = *hpa | proto_tce, oldtce;
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unsigned long idx = index - tbl->it_offset;
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__be64 *ptce = NULL;
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BUG_ON(*hpa & ~IOMMU_PAGE_MASK(tbl));
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if (*direction == DMA_NONE) {
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ptce = pnv_tce(tbl, false, idx, false);
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if (!ptce) {
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*hpa = 0;
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return 0;
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}
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}
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if (!ptce) {
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ptce = pnv_tce(tbl, false, idx, true);
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if (!ptce)
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return -ENOMEM;
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}
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if (newtce & TCE_PCI_WRITE)
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newtce |= TCE_PCI_READ;
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oldtce = be64_to_cpu(xchg(ptce, cpu_to_be64(newtce)));
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*hpa = oldtce & ~(TCE_PCI_READ | TCE_PCI_WRITE);
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*direction = iommu_tce_direction(oldtce);
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return 0;
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}
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__be64 *pnv_tce_useraddrptr(struct iommu_table *tbl, long index, bool alloc)
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{
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if (WARN_ON_ONCE(!tbl->it_userspace))
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return NULL;
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return pnv_tce(tbl, true, index - tbl->it_offset, alloc);
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}
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#endif
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void pnv_tce_free(struct iommu_table *tbl, long index, long npages)
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{
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long i;
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for (i = 0; i < npages; i++) {
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unsigned long idx = index - tbl->it_offset + i;
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__be64 *ptce = pnv_tce(tbl, false, idx, false);
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if (ptce)
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*ptce = cpu_to_be64(0);
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else
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/* Skip the rest of the level */
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i |= tbl->it_level_size - 1;
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}
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}
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unsigned long pnv_tce_get(struct iommu_table *tbl, long index)
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{
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__be64 *ptce = pnv_tce(tbl, false, index - tbl->it_offset, false);
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if (!ptce)
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return 0;
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return be64_to_cpu(*ptce);
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}
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static void pnv_pci_ioda2_table_do_free_pages(__be64 *addr,
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unsigned long size, unsigned int levels)
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{
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const unsigned long addr_ul = (unsigned long) addr &
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~(TCE_PCI_READ | TCE_PCI_WRITE);
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if (levels) {
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long i;
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u64 *tmp = (u64 *) addr_ul;
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for (i = 0; i < size; ++i) {
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unsigned long hpa = be64_to_cpu(tmp[i]);
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if (!(hpa & (TCE_PCI_READ | TCE_PCI_WRITE)))
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continue;
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pnv_pci_ioda2_table_do_free_pages(__va(hpa), size,
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levels - 1);
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}
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}
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free_pages(addr_ul, get_order(size << 3));
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}
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void pnv_pci_ioda2_table_free_pages(struct iommu_table *tbl)
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{
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const unsigned long size = tbl->it_indirect_levels ?
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tbl->it_level_size : tbl->it_size;
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if (!tbl->it_size)
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return;
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pnv_pci_ioda2_table_do_free_pages((__be64 *)tbl->it_base, size,
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tbl->it_indirect_levels);
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if (tbl->it_userspace) {
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pnv_pci_ioda2_table_do_free_pages(tbl->it_userspace, size,
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tbl->it_indirect_levels);
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}
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}
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static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned int shift,
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unsigned int levels, unsigned long limit,
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unsigned long *current_offset, unsigned long *total_allocated)
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{
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__be64 *addr, *tmp;
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unsigned long allocated = 1UL << shift;
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unsigned int entries = 1UL << (shift - 3);
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long i;
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addr = pnv_alloc_tce_level(nid, shift);
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*total_allocated += allocated;
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--levels;
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if (!levels) {
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*current_offset += allocated;
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return addr;
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}
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for (i = 0; i < entries; ++i) {
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tmp = pnv_pci_ioda2_table_do_alloc_pages(nid, shift,
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levels, limit, current_offset, total_allocated);
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if (!tmp)
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break;
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addr[i] = cpu_to_be64(__pa(tmp) |
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TCE_PCI_READ | TCE_PCI_WRITE);
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if (*current_offset >= limit)
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break;
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}
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return addr;
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}
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long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,
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__u32 page_shift, __u64 window_size, __u32 levels,
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bool alloc_userspace_copy, struct iommu_table *tbl)
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{
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void *addr, *uas = NULL;
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unsigned long offset = 0, level_shift, total_allocated = 0;
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unsigned long total_allocated_uas = 0;
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const unsigned int window_shift = ilog2(window_size);
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unsigned int entries_shift = window_shift - page_shift;
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unsigned int table_shift = max_t(unsigned int, entries_shift + 3,
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PAGE_SHIFT);
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const unsigned long tce_table_size = 1UL << table_shift;
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if (!levels || (levels > POWERNV_IOMMU_MAX_LEVELS))
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return -EINVAL;
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if (!is_power_of_2(window_size))
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return -EINVAL;
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/* Adjust direct table size from window_size and levels */
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entries_shift = (entries_shift + levels - 1) / levels;
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level_shift = entries_shift + 3;
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level_shift = max_t(unsigned int, level_shift, PAGE_SHIFT);
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if ((level_shift - 3) * levels + page_shift >= 55)
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return -EINVAL;
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/* Allocate TCE table */
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addr = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift,
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1, tce_table_size, &offset, &total_allocated);
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/* addr==NULL means that the first level allocation failed */
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if (!addr)
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return -ENOMEM;
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/*
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* First level was allocated but some lower level failed as
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* we did not allocate as much as we wanted,
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* release partially allocated table.
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*/
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if (levels == 1 && offset < tce_table_size)
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goto free_tces_exit;
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/* Allocate userspace view of the TCE table */
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if (alloc_userspace_copy) {
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offset = 0;
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uas = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift,
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1, tce_table_size, &offset,
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&total_allocated_uas);
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if (!uas)
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goto free_tces_exit;
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if (levels == 1 && (offset < tce_table_size ||
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total_allocated_uas != total_allocated))
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goto free_uas_exit;
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}
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/* Setup linux iommu table */
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pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, bus_offset,
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page_shift);
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tbl->it_level_size = 1ULL << (level_shift - 3);
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tbl->it_indirect_levels = levels - 1;
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tbl->it_userspace = uas;
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tbl->it_nid = nid;
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pr_debug("Created TCE table: ws=%08llx ts=%lx @%08llx base=%lx uas=%p levels=%d/%d\n",
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window_size, tce_table_size, bus_offset, tbl->it_base,
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tbl->it_userspace, 1, levels);
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return 0;
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free_uas_exit:
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pnv_pci_ioda2_table_do_free_pages(uas,
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1ULL << (level_shift - 3), levels - 1);
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free_tces_exit:
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pnv_pci_ioda2_table_do_free_pages(addr,
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1ULL << (level_shift - 3), levels - 1);
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|
return -ENOMEM;
|
||
|
|
}
|
||
|
|
|
||
|
|
void pnv_pci_unlink_table_and_group(struct iommu_table *tbl,
|
||
|
|
struct iommu_table_group *table_group)
|
||
|
|
{
|
||
|
|
long i;
|
||
|
|
bool found;
|
||
|
|
struct iommu_table_group_link *tgl;
|
||
|
|
|
||
|
|
if (!tbl || !table_group)
|
||
|
|
return;
|
||
|
|
|
||
|
|
/* Remove link to a group from table's list of attached groups */
|
||
|
|
found = false;
|
||
|
|
|
||
|
|
rcu_read_lock();
|
||
|
|
list_for_each_entry_rcu(tgl, &tbl->it_group_list, next) {
|
||
|
|
if (tgl->table_group == table_group) {
|
||
|
|
list_del_rcu(&tgl->next);
|
||
|
|
kfree_rcu(tgl, rcu);
|
||
|
|
found = true;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
rcu_read_unlock();
|
||
|
|
|
||
|
|
if (WARN_ON(!found))
|
||
|
|
return;
|
||
|
|
|
||
|
|
/* Clean a pointer to iommu_table in iommu_table_group::tables[] */
|
||
|
|
found = false;
|
||
|
|
for (i = 0; i < IOMMU_TABLE_GROUP_MAX_TABLES; ++i) {
|
||
|
|
if (table_group->tables[i] == tbl) {
|
||
|
|
iommu_tce_table_put(tbl);
|
||
|
|
table_group->tables[i] = NULL;
|
||
|
|
found = true;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
WARN_ON(!found);
|
||
|
|
}
|
||
|
|
|
||
|
|
long pnv_pci_link_table_and_group(int node, int num,
|
||
|
|
struct iommu_table *tbl,
|
||
|
|
struct iommu_table_group *table_group)
|
||
|
|
{
|
||
|
|
struct iommu_table_group_link *tgl = NULL;
|
||
|
|
|
||
|
|
if (WARN_ON(!tbl || !table_group))
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
tgl = kzalloc_node(sizeof(struct iommu_table_group_link), GFP_KERNEL,
|
||
|
|
node);
|
||
|
|
if (!tgl)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
tgl->table_group = table_group;
|
||
|
|
list_add_rcu(&tgl->next, &tbl->it_group_list);
|
||
|
|
|
||
|
|
table_group->tables[num] = iommu_tce_table_get(tbl);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|