85 lines
2.1 KiB
C
85 lines
2.1 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_SWITCH_TO_H
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#define _ASM_RISCV_SWITCH_TO_H
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#include <linux/jump_label.h>
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#include <linux/sched/task_stack.h>
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#include <asm/hwcap.h>
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#include <asm/processor.h>
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#include <asm/ptrace.h>
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#include <asm/csr.h>
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#ifdef CONFIG_FPU
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extern void __fstate_save(struct task_struct *save_to);
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extern void __fstate_restore(struct task_struct *restore_from);
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static inline void __fstate_clean(struct pt_regs *regs)
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{
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regs->status = (regs->status & ~SR_FS) | SR_FS_CLEAN;
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}
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static inline void fstate_off(struct task_struct *task,
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struct pt_regs *regs)
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{
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regs->status = (regs->status & ~SR_FS) | SR_FS_OFF;
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}
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static inline void fstate_save(struct task_struct *task,
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struct pt_regs *regs)
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{
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if ((regs->status & SR_FS) == SR_FS_DIRTY) {
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__fstate_save(task);
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__fstate_clean(regs);
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}
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}
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static inline void fstate_restore(struct task_struct *task,
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struct pt_regs *regs)
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{
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if ((regs->status & SR_FS) != SR_FS_OFF) {
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__fstate_restore(task);
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__fstate_clean(regs);
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}
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}
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static inline void __switch_to_aux(struct task_struct *prev,
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struct task_struct *next)
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{
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struct pt_regs *regs;
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regs = task_pt_regs(prev);
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if (unlikely(regs->status & SR_SD))
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fstate_save(prev, regs);
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fstate_restore(next, task_pt_regs(next));
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}
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static __always_inline bool has_fpu(void)
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{
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return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
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riscv_has_extension_likely(RISCV_ISA_EXT_d);
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}
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#else
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static __always_inline bool has_fpu(void) { return false; }
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#define fstate_save(task, regs) do { } while (0)
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#define fstate_restore(task, regs) do { } while (0)
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#define __switch_to_aux(__prev, __next) do { } while (0)
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#endif
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extern struct task_struct *__switch_to(struct task_struct *,
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struct task_struct *);
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#define switch_to(prev, next, last) \
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do { \
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struct task_struct *__prev = (prev); \
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struct task_struct *__next = (next); \
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if (has_fpu()) \
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__switch_to_aux(__prev, __next); \
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((last) = __switch_to(__prev, __next)); \
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} while (0)
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#endif /* _ASM_RISCV_SWITCH_TO_H */
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