888 lines
18 KiB
C
888 lines
18 KiB
C
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/*
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* arch/sh/mm/pmb.c
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*
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* Privileged Space Mapping Buffer (PMB) Support.
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*
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* Copyright (C) 2005 - 2011 Paul Mundt
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* Copyright (C) 2010 Matt Fleming
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/syscore_ops.h>
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#include <linux/cpu.h>
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#include <linux/module.h>
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#include <linux/bitops.h>
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#include <linux/debugfs.h>
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#include <linux/fs.h>
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#include <linux/seq_file.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/spinlock.h>
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#include <linux/vmalloc.h>
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#include <linux/pgtable.h>
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#include <asm/cacheflush.h>
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#include <linux/sizes.h>
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#include <linux/uaccess.h>
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#include <asm/page.h>
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#include <asm/mmu.h>
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#include <asm/mmu_context.h>
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struct pmb_entry;
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struct pmb_entry {
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unsigned long vpn;
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unsigned long ppn;
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unsigned long flags;
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unsigned long size;
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raw_spinlock_t lock;
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/*
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* 0 .. NR_PMB_ENTRIES for specific entry selection, or
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* PMB_NO_ENTRY to search for a free one
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*/
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int entry;
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/* Adjacent entry link for contiguous multi-entry mappings */
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struct pmb_entry *link;
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};
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static struct {
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unsigned long size;
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int flag;
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} pmb_sizes[] = {
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{ .size = SZ_512M, .flag = PMB_SZ_512M, },
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{ .size = SZ_128M, .flag = PMB_SZ_128M, },
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{ .size = SZ_64M, .flag = PMB_SZ_64M, },
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{ .size = SZ_16M, .flag = PMB_SZ_16M, },
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};
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static void pmb_unmap_entry(struct pmb_entry *, int depth);
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static DEFINE_RWLOCK(pmb_rwlock);
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static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES];
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static DECLARE_BITMAP(pmb_map, NR_PMB_ENTRIES);
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static unsigned int pmb_iomapping_enabled;
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static __always_inline unsigned long mk_pmb_entry(unsigned int entry)
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{
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return (entry & PMB_E_MASK) << PMB_E_SHIFT;
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}
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static __always_inline unsigned long mk_pmb_addr(unsigned int entry)
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{
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return mk_pmb_entry(entry) | PMB_ADDR;
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}
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static __always_inline unsigned long mk_pmb_data(unsigned int entry)
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{
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return mk_pmb_entry(entry) | PMB_DATA;
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}
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static __always_inline unsigned int pmb_ppn_in_range(unsigned long ppn)
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{
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return ppn >= __pa(memory_start) && ppn < __pa(memory_end);
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}
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/*
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* Ensure that the PMB entries match our cache configuration.
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*
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* When we are in 32-bit address extended mode, CCR.CB becomes
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* invalid, so care must be taken to manually adjust cacheable
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* translations.
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*/
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static __always_inline unsigned long pmb_cache_flags(void)
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{
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unsigned long flags = 0;
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#if defined(CONFIG_CACHE_OFF)
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flags |= PMB_WT | PMB_UB;
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#elif defined(CONFIG_CACHE_WRITETHROUGH)
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flags |= PMB_C | PMB_WT | PMB_UB;
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#elif defined(CONFIG_CACHE_WRITEBACK)
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flags |= PMB_C;
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#endif
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return flags;
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}
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/*
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* Convert typical pgprot value to the PMB equivalent
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*/
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static inline unsigned long pgprot_to_pmb_flags(pgprot_t prot)
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{
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unsigned long pmb_flags = 0;
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u64 flags = pgprot_val(prot);
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if (flags & _PAGE_CACHABLE)
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pmb_flags |= PMB_C;
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if (flags & _PAGE_WT)
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pmb_flags |= PMB_WT | PMB_UB;
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return pmb_flags;
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}
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static inline bool pmb_can_merge(struct pmb_entry *a, struct pmb_entry *b)
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{
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return (b->vpn == (a->vpn + a->size)) &&
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(b->ppn == (a->ppn + a->size)) &&
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(b->flags == a->flags);
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}
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static bool pmb_mapping_exists(unsigned long vaddr, phys_addr_t phys,
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unsigned long size)
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{
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int i;
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read_lock(&pmb_rwlock);
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for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
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struct pmb_entry *pmbe, *iter;
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unsigned long span;
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if (!test_bit(i, pmb_map))
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continue;
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pmbe = &pmb_entry_list[i];
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/*
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* See if VPN and PPN are bounded by an existing mapping.
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*/
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if ((vaddr < pmbe->vpn) || (vaddr >= (pmbe->vpn + pmbe->size)))
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continue;
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if ((phys < pmbe->ppn) || (phys >= (pmbe->ppn + pmbe->size)))
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continue;
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/*
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* Now see if we're in range of a simple mapping.
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*/
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if (size <= pmbe->size) {
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read_unlock(&pmb_rwlock);
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return true;
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}
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span = pmbe->size;
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/*
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* Finally for sizes that involve compound mappings, walk
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* the chain.
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*/
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for (iter = pmbe->link; iter; iter = iter->link)
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span += iter->size;
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/*
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* Nothing else to do if the range requirements are met.
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*/
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if (size <= span) {
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read_unlock(&pmb_rwlock);
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return true;
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}
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}
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read_unlock(&pmb_rwlock);
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return false;
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}
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static bool pmb_size_valid(unsigned long size)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
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if (pmb_sizes[i].size == size)
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return true;
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return false;
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}
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static inline bool pmb_addr_valid(unsigned long addr, unsigned long size)
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{
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return (addr >= P1SEG && (addr + size - 1) < P3SEG);
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}
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static inline bool pmb_prot_valid(pgprot_t prot)
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{
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return (pgprot_val(prot) & _PAGE_USER) == 0;
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}
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static int pmb_size_to_flags(unsigned long size)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
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if (pmb_sizes[i].size == size)
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return pmb_sizes[i].flag;
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return 0;
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}
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static int pmb_alloc_entry(void)
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{
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int pos;
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pos = find_first_zero_bit(pmb_map, NR_PMB_ENTRIES);
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if (pos >= 0 && pos < NR_PMB_ENTRIES)
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__set_bit(pos, pmb_map);
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else
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pos = -ENOSPC;
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return pos;
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}
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static struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
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unsigned long flags, int entry)
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{
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struct pmb_entry *pmbe;
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unsigned long irqflags;
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void *ret = NULL;
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int pos;
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write_lock_irqsave(&pmb_rwlock, irqflags);
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if (entry == PMB_NO_ENTRY) {
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pos = pmb_alloc_entry();
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if (unlikely(pos < 0)) {
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ret = ERR_PTR(pos);
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goto out;
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}
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} else {
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if (__test_and_set_bit(entry, pmb_map)) {
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ret = ERR_PTR(-ENOSPC);
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goto out;
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}
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pos = entry;
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}
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write_unlock_irqrestore(&pmb_rwlock, irqflags);
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pmbe = &pmb_entry_list[pos];
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memset(pmbe, 0, sizeof(struct pmb_entry));
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raw_spin_lock_init(&pmbe->lock);
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pmbe->vpn = vpn;
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pmbe->ppn = ppn;
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pmbe->flags = flags;
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pmbe->entry = pos;
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return pmbe;
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out:
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write_unlock_irqrestore(&pmb_rwlock, irqflags);
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return ret;
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}
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static void pmb_free(struct pmb_entry *pmbe)
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{
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__clear_bit(pmbe->entry, pmb_map);
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pmbe->entry = PMB_NO_ENTRY;
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pmbe->link = NULL;
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}
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/*
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* Must be run uncached.
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*/
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static void __set_pmb_entry(struct pmb_entry *pmbe)
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{
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unsigned long addr, data;
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addr = mk_pmb_addr(pmbe->entry);
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data = mk_pmb_data(pmbe->entry);
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jump_to_uncached();
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/* Set V-bit */
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__raw_writel(pmbe->vpn | PMB_V, addr);
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__raw_writel(pmbe->ppn | pmbe->flags | PMB_V, data);
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back_to_cached();
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}
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static void __clear_pmb_entry(struct pmb_entry *pmbe)
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{
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unsigned long addr, data;
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unsigned long addr_val, data_val;
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addr = mk_pmb_addr(pmbe->entry);
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data = mk_pmb_data(pmbe->entry);
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addr_val = __raw_readl(addr);
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data_val = __raw_readl(data);
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/* Clear V-bit */
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writel_uncached(addr_val & ~PMB_V, addr);
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writel_uncached(data_val & ~PMB_V, data);
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}
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#ifdef CONFIG_PM
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static void set_pmb_entry(struct pmb_entry *pmbe)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&pmbe->lock, flags);
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__set_pmb_entry(pmbe);
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raw_spin_unlock_irqrestore(&pmbe->lock, flags);
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}
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#endif /* CONFIG_PM */
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int pmb_bolt_mapping(unsigned long vaddr, phys_addr_t phys,
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unsigned long size, pgprot_t prot)
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{
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struct pmb_entry *pmbp, *pmbe;
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unsigned long orig_addr, orig_size;
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unsigned long flags, pmb_flags;
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int i, mapped;
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if (size < SZ_16M)
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return -EINVAL;
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if (!pmb_addr_valid(vaddr, size))
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return -EFAULT;
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if (pmb_mapping_exists(vaddr, phys, size))
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return 0;
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orig_addr = vaddr;
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orig_size = size;
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flush_tlb_kernel_range(vaddr, vaddr + size);
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pmb_flags = pgprot_to_pmb_flags(prot);
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pmbp = NULL;
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do {
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for (i = mapped = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
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if (size < pmb_sizes[i].size)
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continue;
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pmbe = pmb_alloc(vaddr, phys, pmb_flags |
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pmb_sizes[i].flag, PMB_NO_ENTRY);
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if (IS_ERR(pmbe)) {
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pmb_unmap_entry(pmbp, mapped);
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return PTR_ERR(pmbe);
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}
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raw_spin_lock_irqsave(&pmbe->lock, flags);
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pmbe->size = pmb_sizes[i].size;
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__set_pmb_entry(pmbe);
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phys += pmbe->size;
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vaddr += pmbe->size;
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size -= pmbe->size;
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/*
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* Link adjacent entries that span multiple PMB
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* entries for easier tear-down.
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*/
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if (likely(pmbp)) {
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raw_spin_lock_nested(&pmbp->lock,
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SINGLE_DEPTH_NESTING);
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pmbp->link = pmbe;
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raw_spin_unlock(&pmbp->lock);
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}
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pmbp = pmbe;
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/*
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* Instead of trying smaller sizes on every
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* iteration (even if we succeed in allocating
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* space), try using pmb_sizes[i].size again.
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*/
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i--;
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mapped++;
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raw_spin_unlock_irqrestore(&pmbe->lock, flags);
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}
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} while (size >= SZ_16M);
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flush_cache_vmap(orig_addr, orig_addr + orig_size);
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return 0;
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}
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void __iomem *pmb_remap_caller(phys_addr_t phys, unsigned long size,
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pgprot_t prot, void *caller)
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{
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unsigned long vaddr;
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phys_addr_t offset, last_addr;
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phys_addr_t align_mask;
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unsigned long aligned;
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struct vm_struct *area;
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int i, ret;
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if (!pmb_iomapping_enabled)
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return NULL;
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/*
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* Small mappings need to go through the TLB.
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*/
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if (size < SZ_16M)
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return ERR_PTR(-EINVAL);
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if (!pmb_prot_valid(prot))
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return ERR_PTR(-EINVAL);
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for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
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if (size >= pmb_sizes[i].size)
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break;
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last_addr = phys + size;
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align_mask = ~(pmb_sizes[i].size - 1);
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offset = phys & ~align_mask;
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phys &= align_mask;
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aligned = ALIGN(last_addr, pmb_sizes[i].size) - phys;
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/*
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* XXX: This should really start from uncached_end, but this
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* causes the MMU to reset, so for now we restrict it to the
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* 0xb000...0xc000 range.
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*/
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area = __get_vm_area_caller(aligned, VM_IOREMAP, 0xb0000000,
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P3SEG, caller);
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if (!area)
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return NULL;
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area->phys_addr = phys;
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vaddr = (unsigned long)area->addr;
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ret = pmb_bolt_mapping(vaddr, phys, size, prot);
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if (unlikely(ret != 0))
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return ERR_PTR(ret);
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return (void __iomem *)(offset + (char *)vaddr);
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}
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int pmb_unmap(void __iomem *addr)
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{
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struct pmb_entry *pmbe = NULL;
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unsigned long vaddr = (unsigned long __force)addr;
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int i, found = 0;
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||
|
read_lock(&pmb_rwlock);
|
||
|
|
||
|
for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
|
||
|
if (test_bit(i, pmb_map)) {
|
||
|
pmbe = &pmb_entry_list[i];
|
||
|
if (pmbe->vpn == vaddr) {
|
||
|
found = 1;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
|
||
|
read_unlock(&pmb_rwlock);
|
||
|
|
||
|
if (found) {
|
||
|
pmb_unmap_entry(pmbe, NR_PMB_ENTRIES);
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
static void __pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
|
||
|
{
|
||
|
do {
|
||
|
struct pmb_entry *pmblink = pmbe;
|
||
|
|
||
|
/*
|
||
|
* We may be called before this pmb_entry has been
|
||
|
* entered into the PMB table via set_pmb_entry(), but
|
||
|
* that's OK because we've allocated a unique slot for
|
||
|
* this entry in pmb_alloc() (even if we haven't filled
|
||
|
* it yet).
|
||
|
*
|
||
|
* Therefore, calling __clear_pmb_entry() is safe as no
|
||
|
* other mapping can be using that slot.
|
||
|
*/
|
||
|
__clear_pmb_entry(pmbe);
|
||
|
|
||
|
flush_cache_vunmap(pmbe->vpn, pmbe->vpn + pmbe->size);
|
||
|
|
||
|
pmbe = pmblink->link;
|
||
|
|
||
|
pmb_free(pmblink);
|
||
|
} while (pmbe && --depth);
|
||
|
}
|
||
|
|
||
|
static void pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
|
||
|
{
|
||
|
unsigned long flags;
|
||
|
|
||
|
if (unlikely(!pmbe))
|
||
|
return;
|
||
|
|
||
|
write_lock_irqsave(&pmb_rwlock, flags);
|
||
|
__pmb_unmap_entry(pmbe, depth);
|
||
|
write_unlock_irqrestore(&pmb_rwlock, flags);
|
||
|
}
|
||
|
|
||
|
static void __init pmb_notify(void)
|
||
|
{
|
||
|
int i;
|
||
|
|
||
|
pr_info("PMB: boot mappings:\n");
|
||
|
|
||
|
read_lock(&pmb_rwlock);
|
||
|
|
||
|
for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
|
||
|
struct pmb_entry *pmbe;
|
||
|
|
||
|
if (!test_bit(i, pmb_map))
|
||
|
continue;
|
||
|
|
||
|
pmbe = &pmb_entry_list[i];
|
||
|
|
||
|
pr_info(" 0x%08lx -> 0x%08lx [ %4ldMB %2scached ]\n",
|
||
|
pmbe->vpn >> PAGE_SHIFT, pmbe->ppn >> PAGE_SHIFT,
|
||
|
pmbe->size >> 20, (pmbe->flags & PMB_C) ? "" : "un");
|
||
|
}
|
||
|
|
||
|
read_unlock(&pmb_rwlock);
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Sync our software copy of the PMB mappings with those in hardware. The
|
||
|
* mappings in the hardware PMB were either set up by the bootloader or
|
||
|
* very early on by the kernel.
|
||
|
*/
|
||
|
static void __init pmb_synchronize(void)
|
||
|
{
|
||
|
struct pmb_entry *pmbp = NULL;
|
||
|
int i, j;
|
||
|
|
||
|
/*
|
||
|
* Run through the initial boot mappings, log the established
|
||
|
* ones, and blow away anything that falls outside of the valid
|
||
|
* PPN range. Specifically, we only care about existing mappings
|
||
|
* that impact the cached/uncached sections.
|
||
|
*
|
||
|
* Note that touching these can be a bit of a minefield; the boot
|
||
|
* loader can establish multi-page mappings with the same caching
|
||
|
* attributes, so we need to ensure that we aren't modifying a
|
||
|
* mapping that we're presently executing from, or may execute
|
||
|
* from in the case of straddling page boundaries.
|
||
|
*
|
||
|
* In the future we will have to tidy up after the boot loader by
|
||
|
* jumping between the cached and uncached mappings and tearing
|
||
|
* down alternating mappings while executing from the other.
|
||
|
*/
|
||
|
for (i = 0; i < NR_PMB_ENTRIES; i++) {
|
||
|
unsigned long addr, data;
|
||
|
unsigned long addr_val, data_val;
|
||
|
unsigned long ppn, vpn, flags;
|
||
|
unsigned long irqflags;
|
||
|
unsigned int size;
|
||
|
struct pmb_entry *pmbe;
|
||
|
|
||
|
addr = mk_pmb_addr(i);
|
||
|
data = mk_pmb_data(i);
|
||
|
|
||
|
addr_val = __raw_readl(addr);
|
||
|
data_val = __raw_readl(data);
|
||
|
|
||
|
/*
|
||
|
* Skip over any bogus entries
|
||
|
*/
|
||
|
if (!(data_val & PMB_V) || !(addr_val & PMB_V))
|
||
|
continue;
|
||
|
|
||
|
ppn = data_val & PMB_PFN_MASK;
|
||
|
vpn = addr_val & PMB_PFN_MASK;
|
||
|
|
||
|
/*
|
||
|
* Only preserve in-range mappings.
|
||
|
*/
|
||
|
if (!pmb_ppn_in_range(ppn)) {
|
||
|
/*
|
||
|
* Invalidate anything out of bounds.
|
||
|
*/
|
||
|
writel_uncached(addr_val & ~PMB_V, addr);
|
||
|
writel_uncached(data_val & ~PMB_V, data);
|
||
|
continue;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Update the caching attributes if necessary
|
||
|
*/
|
||
|
if (data_val & PMB_C) {
|
||
|
data_val &= ~PMB_CACHE_MASK;
|
||
|
data_val |= pmb_cache_flags();
|
||
|
|
||
|
writel_uncached(data_val, data);
|
||
|
}
|
||
|
|
||
|
size = data_val & PMB_SZ_MASK;
|
||
|
flags = size | (data_val & PMB_CACHE_MASK);
|
||
|
|
||
|
pmbe = pmb_alloc(vpn, ppn, flags, i);
|
||
|
if (IS_ERR(pmbe)) {
|
||
|
WARN_ON_ONCE(1);
|
||
|
continue;
|
||
|
}
|
||
|
|
||
|
raw_spin_lock_irqsave(&pmbe->lock, irqflags);
|
||
|
|
||
|
for (j = 0; j < ARRAY_SIZE(pmb_sizes); j++)
|
||
|
if (pmb_sizes[j].flag == size)
|
||
|
pmbe->size = pmb_sizes[j].size;
|
||
|
|
||
|
if (pmbp) {
|
||
|
raw_spin_lock_nested(&pmbp->lock, SINGLE_DEPTH_NESTING);
|
||
|
/*
|
||
|
* Compare the previous entry against the current one to
|
||
|
* see if the entries span a contiguous mapping. If so,
|
||
|
* setup the entry links accordingly. Compound mappings
|
||
|
* are later coalesced.
|
||
|
*/
|
||
|
if (pmb_can_merge(pmbp, pmbe))
|
||
|
pmbp->link = pmbe;
|
||
|
raw_spin_unlock(&pmbp->lock);
|
||
|
}
|
||
|
|
||
|
pmbp = pmbe;
|
||
|
|
||
|
raw_spin_unlock_irqrestore(&pmbe->lock, irqflags);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static void __init pmb_merge(struct pmb_entry *head)
|
||
|
{
|
||
|
unsigned long span, newsize;
|
||
|
struct pmb_entry *tail;
|
||
|
int i = 1, depth = 0;
|
||
|
|
||
|
span = newsize = head->size;
|
||
|
|
||
|
tail = head->link;
|
||
|
while (tail) {
|
||
|
span += tail->size;
|
||
|
|
||
|
if (pmb_size_valid(span)) {
|
||
|
newsize = span;
|
||
|
depth = i;
|
||
|
}
|
||
|
|
||
|
/* This is the end of the line.. */
|
||
|
if (!tail->link)
|
||
|
break;
|
||
|
|
||
|
tail = tail->link;
|
||
|
i++;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* The merged page size must be valid.
|
||
|
*/
|
||
|
if (!depth || !pmb_size_valid(newsize))
|
||
|
return;
|
||
|
|
||
|
head->flags &= ~PMB_SZ_MASK;
|
||
|
head->flags |= pmb_size_to_flags(newsize);
|
||
|
|
||
|
head->size = newsize;
|
||
|
|
||
|
__pmb_unmap_entry(head->link, depth);
|
||
|
__set_pmb_entry(head);
|
||
|
}
|
||
|
|
||
|
static void __init pmb_coalesce(void)
|
||
|
{
|
||
|
unsigned long flags;
|
||
|
int i;
|
||
|
|
||
|
write_lock_irqsave(&pmb_rwlock, flags);
|
||
|
|
||
|
for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
|
||
|
struct pmb_entry *pmbe;
|
||
|
|
||
|
if (!test_bit(i, pmb_map))
|
||
|
continue;
|
||
|
|
||
|
pmbe = &pmb_entry_list[i];
|
||
|
|
||
|
/*
|
||
|
* We're only interested in compound mappings
|
||
|
*/
|
||
|
if (!pmbe->link)
|
||
|
continue;
|
||
|
|
||
|
/*
|
||
|
* Nothing to do if it already uses the largest possible
|
||
|
* page size.
|
||
|
*/
|
||
|
if (pmbe->size == SZ_512M)
|
||
|
continue;
|
||
|
|
||
|
pmb_merge(pmbe);
|
||
|
}
|
||
|
|
||
|
write_unlock_irqrestore(&pmb_rwlock, flags);
|
||
|
}
|
||
|
|
||
|
#ifdef CONFIG_UNCACHED_MAPPING
|
||
|
static void __init pmb_resize(void)
|
||
|
{
|
||
|
int i;
|
||
|
|
||
|
/*
|
||
|
* If the uncached mapping was constructed by the kernel, it will
|
||
|
* already be a reasonable size.
|
||
|
*/
|
||
|
if (uncached_size == SZ_16M)
|
||
|
return;
|
||
|
|
||
|
read_lock(&pmb_rwlock);
|
||
|
|
||
|
for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
|
||
|
struct pmb_entry *pmbe;
|
||
|
unsigned long flags;
|
||
|
|
||
|
if (!test_bit(i, pmb_map))
|
||
|
continue;
|
||
|
|
||
|
pmbe = &pmb_entry_list[i];
|
||
|
|
||
|
if (pmbe->vpn != uncached_start)
|
||
|
continue;
|
||
|
|
||
|
/*
|
||
|
* Found it, now resize it.
|
||
|
*/
|
||
|
raw_spin_lock_irqsave(&pmbe->lock, flags);
|
||
|
|
||
|
pmbe->size = SZ_16M;
|
||
|
pmbe->flags &= ~PMB_SZ_MASK;
|
||
|
pmbe->flags |= pmb_size_to_flags(pmbe->size);
|
||
|
|
||
|
uncached_resize(pmbe->size);
|
||
|
|
||
|
__set_pmb_entry(pmbe);
|
||
|
|
||
|
raw_spin_unlock_irqrestore(&pmbe->lock, flags);
|
||
|
}
|
||
|
|
||
|
read_unlock(&pmb_rwlock);
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
static int __init early_pmb(char *p)
|
||
|
{
|
||
|
if (!p)
|
||
|
return 0;
|
||
|
|
||
|
if (strstr(p, "iomap"))
|
||
|
pmb_iomapping_enabled = 1;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
early_param("pmb", early_pmb);
|
||
|
|
||
|
void __init pmb_init(void)
|
||
|
{
|
||
|
/* Synchronize software state */
|
||
|
pmb_synchronize();
|
||
|
|
||
|
/* Attempt to combine compound mappings */
|
||
|
pmb_coalesce();
|
||
|
|
||
|
#ifdef CONFIG_UNCACHED_MAPPING
|
||
|
/* Resize initial mappings, if necessary */
|
||
|
pmb_resize();
|
||
|
#endif
|
||
|
|
||
|
/* Log them */
|
||
|
pmb_notify();
|
||
|
|
||
|
writel_uncached(0, PMB_IRMCR);
|
||
|
|
||
|
/* Flush out the TLB */
|
||
|
local_flush_tlb_all();
|
||
|
ctrl_barrier();
|
||
|
}
|
||
|
|
||
|
bool __in_29bit_mode(void)
|
||
|
{
|
||
|
return (__raw_readl(PMB_PASCR) & PASCR_SE) == 0;
|
||
|
}
|
||
|
|
||
|
static int pmb_debugfs_show(struct seq_file *file, void *iter)
|
||
|
{
|
||
|
int i;
|
||
|
|
||
|
seq_printf(file, "V: Valid, C: Cacheable, WT: Write-Through\n"
|
||
|
"CB: Copy-Back, B: Buffered, UB: Unbuffered\n");
|
||
|
seq_printf(file, "ety vpn ppn size flags\n");
|
||
|
|
||
|
for (i = 0; i < NR_PMB_ENTRIES; i++) {
|
||
|
unsigned long addr, data;
|
||
|
unsigned int size;
|
||
|
char *sz_str = NULL;
|
||
|
|
||
|
addr = __raw_readl(mk_pmb_addr(i));
|
||
|
data = __raw_readl(mk_pmb_data(i));
|
||
|
|
||
|
size = data & PMB_SZ_MASK;
|
||
|
sz_str = (size == PMB_SZ_16M) ? " 16MB":
|
||
|
(size == PMB_SZ_64M) ? " 64MB":
|
||
|
(size == PMB_SZ_128M) ? "128MB":
|
||
|
"512MB";
|
||
|
|
||
|
/* 02: V 0x88 0x08 128MB C CB B */
|
||
|
seq_printf(file, "%02d: %c 0x%02lx 0x%02lx %s %c %s %s\n",
|
||
|
i, ((addr & PMB_V) && (data & PMB_V)) ? 'V' : ' ',
|
||
|
(addr >> 24) & 0xff, (data >> 24) & 0xff,
|
||
|
sz_str, (data & PMB_C) ? 'C' : ' ',
|
||
|
(data & PMB_WT) ? "WT" : "CB",
|
||
|
(data & PMB_UB) ? "UB" : " B");
|
||
|
}
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
DEFINE_SHOW_ATTRIBUTE(pmb_debugfs);
|
||
|
|
||
|
static int __init pmb_debugfs_init(void)
|
||
|
{
|
||
|
debugfs_create_file("pmb", S_IFREG | S_IRUGO, arch_debugfs_dir, NULL,
|
||
|
&pmb_debugfs_fops);
|
||
|
return 0;
|
||
|
}
|
||
|
subsys_initcall(pmb_debugfs_init);
|
||
|
|
||
|
#ifdef CONFIG_PM
|
||
|
static void pmb_syscore_resume(void)
|
||
|
{
|
||
|
struct pmb_entry *pmbe;
|
||
|
int i;
|
||
|
|
||
|
read_lock(&pmb_rwlock);
|
||
|
|
||
|
for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
|
||
|
if (test_bit(i, pmb_map)) {
|
||
|
pmbe = &pmb_entry_list[i];
|
||
|
set_pmb_entry(pmbe);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
read_unlock(&pmb_rwlock);
|
||
|
}
|
||
|
|
||
|
static struct syscore_ops pmb_syscore_ops = {
|
||
|
.resume = pmb_syscore_resume,
|
||
|
};
|
||
|
|
||
|
static int __init pmb_sysdev_init(void)
|
||
|
{
|
||
|
register_syscore_ops(&pmb_syscore_ops);
|
||
|
return 0;
|
||
|
}
|
||
|
subsys_initcall(pmb_sysdev_init);
|
||
|
#endif
|