66 lines
1.6 KiB
C
66 lines
1.6 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2018 Cadence Design Systems Inc. */
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#ifndef _ASM_XTENSA_JUMP_LABEL_H
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#define _ASM_XTENSA_JUMP_LABEL_H
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#define JUMP_LABEL_NOP_SIZE 3
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static __always_inline bool arch_static_branch(struct static_key *key,
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bool branch)
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{
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asm_volatile_goto("1:\n\t"
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"_nop\n\t"
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".pushsection __jump_table, \"aw\"\n\t"
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".word 1b, %l[l_yes], %c0\n\t"
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".popsection\n\t"
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: : "i" (&((char *)key)[branch]) : : l_yes);
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return false;
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l_yes:
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return true;
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}
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static __always_inline bool arch_static_branch_jump(struct static_key *key,
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bool branch)
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{
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/*
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* Xtensa assembler will mark certain points in the code
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* as unreachable, so that later assembler or linker relaxation
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* passes could use them. A spot right after the J instruction
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* is one such point. Assembler and/or linker may insert padding
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* or literals here, breaking code flow in case the J instruction
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* is later replaced with NOP. Put a label right after the J to
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* make it reachable and wrap both into a no-transform block
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* to avoid any assembler interference with this.
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*/
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asm_volatile_goto("1:\n\t"
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".begin no-transform\n\t"
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"_j %l[l_yes]\n\t"
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"2:\n\t"
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".end no-transform\n\t"
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".pushsection __jump_table, \"aw\"\n\t"
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".word 1b, %l[l_yes], %c0\n\t"
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".popsection\n\t"
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: : "i" (&((char *)key)[branch]) : : l_yes);
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return false;
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l_yes:
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return true;
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}
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typedef u32 jump_label_t;
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struct jump_entry {
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jump_label_t code;
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jump_label_t target;
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jump_label_t key;
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};
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#endif /* __ASSEMBLY__ */
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#endif
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