252 lines
7.2 KiB
C
252 lines
7.2 KiB
C
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Christian König <christian.koenig@amd.com>
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*/
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/**
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* DOC: MMU Notifier
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*
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* For coherent userptr handling registers an MMU notifier to inform the driver
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* about updates on the page tables of a process.
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*
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* When somebody tries to invalidate the page tables we block the update until
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* all operations on the pages in question are completed, then those pages are
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* marked as accessed and also dirty if it wasn't a read only access.
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*
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* New command submissions using the userptrs in question are delayed until all
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* page table invalidation are completed and we once more see a coherent process
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* address space.
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*/
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#include <linux/firmware.h>
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#include <linux/module.h>
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#include <drm/drm.h>
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#include "amdgpu.h"
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#include "amdgpu_amdkfd.h"
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#include "amdgpu_hmm.h"
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#define MAX_WALK_BYTE (2UL << 30)
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/**
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* amdgpu_hmm_invalidate_gfx - callback to notify about mm change
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*
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* @mni: the range (mm) is about to update
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* @range: details on the invalidation
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* @cur_seq: Value to pass to mmu_interval_set_seq()
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*
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* Block for operations on BOs to finish and mark pages as accessed and
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* potentially dirty.
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*/
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static bool amdgpu_hmm_invalidate_gfx(struct mmu_interval_notifier *mni,
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const struct mmu_notifier_range *range,
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unsigned long cur_seq)
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{
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struct amdgpu_bo *bo = container_of(mni, struct amdgpu_bo, notifier);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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long r;
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if (!mmu_notifier_range_blockable(range))
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return false;
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mutex_lock(&adev->notifier_lock);
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mmu_interval_set_seq(mni, cur_seq);
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r = dma_resv_wait_timeout(bo->tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP,
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false, MAX_SCHEDULE_TIMEOUT);
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mutex_unlock(&adev->notifier_lock);
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if (r <= 0)
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DRM_ERROR("(%ld) failed to wait for user bo\n", r);
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return true;
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}
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static const struct mmu_interval_notifier_ops amdgpu_hmm_gfx_ops = {
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.invalidate = amdgpu_hmm_invalidate_gfx,
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};
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/**
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* amdgpu_hmm_invalidate_hsa - callback to notify about mm change
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*
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* @mni: the range (mm) is about to update
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* @range: details on the invalidation
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* @cur_seq: Value to pass to mmu_interval_set_seq()
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*
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* We temporarily evict the BO attached to this range. This necessitates
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* evicting all user-mode queues of the process.
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*/
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static bool amdgpu_hmm_invalidate_hsa(struct mmu_interval_notifier *mni,
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const struct mmu_notifier_range *range,
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unsigned long cur_seq)
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{
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struct amdgpu_bo *bo = container_of(mni, struct amdgpu_bo, notifier);
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if (!mmu_notifier_range_blockable(range))
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return false;
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amdgpu_amdkfd_evict_userptr(mni, cur_seq, bo->kfd_bo);
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return true;
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}
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static const struct mmu_interval_notifier_ops amdgpu_hmm_hsa_ops = {
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.invalidate = amdgpu_hmm_invalidate_hsa,
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};
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/**
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* amdgpu_hmm_register - register a BO for notifier updates
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*
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* @bo: amdgpu buffer object
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* @addr: userptr addr we should monitor
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*
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* Registers a mmu_notifier for the given BO at the specified address.
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* Returns 0 on success, -ERRNO if anything goes wrong.
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*/
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int amdgpu_hmm_register(struct amdgpu_bo *bo, unsigned long addr)
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{
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if (bo->kfd_bo)
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return mmu_interval_notifier_insert(&bo->notifier, current->mm,
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addr, amdgpu_bo_size(bo),
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&amdgpu_hmm_hsa_ops);
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return mmu_interval_notifier_insert(&bo->notifier, current->mm, addr,
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amdgpu_bo_size(bo),
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&amdgpu_hmm_gfx_ops);
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}
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/**
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* amdgpu_hmm_unregister - unregister a BO for notifier updates
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*
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* @bo: amdgpu buffer object
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*
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* Remove any registration of mmu notifier updates from the buffer object.
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*/
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void amdgpu_hmm_unregister(struct amdgpu_bo *bo)
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{
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if (!bo->notifier.mm)
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return;
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mmu_interval_notifier_remove(&bo->notifier);
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bo->notifier.mm = NULL;
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}
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int amdgpu_hmm_range_get_pages(struct mmu_interval_notifier *notifier,
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uint64_t start, uint64_t npages, bool readonly,
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void *owner, struct page **pages,
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struct hmm_range **phmm_range)
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{
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struct hmm_range *hmm_range;
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unsigned long end;
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unsigned long timeout;
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unsigned long i;
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unsigned long *pfns;
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int r = 0;
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hmm_range = kzalloc(sizeof(*hmm_range), GFP_KERNEL);
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if (unlikely(!hmm_range))
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return -ENOMEM;
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pfns = kvmalloc_array(npages, sizeof(*pfns), GFP_KERNEL);
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if (unlikely(!pfns)) {
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r = -ENOMEM;
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goto out_free_range;
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}
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hmm_range->notifier = notifier;
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hmm_range->default_flags = HMM_PFN_REQ_FAULT;
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if (!readonly)
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hmm_range->default_flags |= HMM_PFN_REQ_WRITE;
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hmm_range->hmm_pfns = pfns;
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hmm_range->start = start;
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end = start + npages * PAGE_SIZE;
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hmm_range->dev_private_owner = owner;
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do {
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hmm_range->end = min(hmm_range->start + MAX_WALK_BYTE, end);
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pr_debug("hmm range: start = 0x%lx, end = 0x%lx",
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hmm_range->start, hmm_range->end);
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/* Assuming 512MB takes maxmium 1 second to fault page address */
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timeout = max((hmm_range->end - hmm_range->start) >> 29, 1UL);
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timeout *= HMM_RANGE_DEFAULT_TIMEOUT;
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timeout = jiffies + msecs_to_jiffies(timeout);
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retry:
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hmm_range->notifier_seq = mmu_interval_read_begin(notifier);
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r = hmm_range_fault(hmm_range);
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if (unlikely(r)) {
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/*
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* FIXME: This timeout should encompass the retry from
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* mmu_interval_read_retry() as well.
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*/
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if (r == -EBUSY && !time_after(jiffies, timeout))
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goto retry;
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goto out_free_pfns;
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}
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if (hmm_range->end == end)
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break;
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hmm_range->hmm_pfns += MAX_WALK_BYTE >> PAGE_SHIFT;
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hmm_range->start = hmm_range->end;
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schedule();
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} while (hmm_range->end < end);
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hmm_range->start = start;
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hmm_range->hmm_pfns = pfns;
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/*
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* Due to default_flags, all pages are HMM_PFN_VALID or
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* hmm_range_fault() fails. FIXME: The pages cannot be touched outside
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* the notifier_lock, and mmu_interval_read_retry() must be done first.
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*/
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for (i = 0; pages && i < npages; i++)
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pages[i] = hmm_pfn_to_page(pfns[i]);
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*phmm_range = hmm_range;
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return 0;
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out_free_pfns:
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kvfree(pfns);
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out_free_range:
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kfree(hmm_range);
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return r;
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}
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bool amdgpu_hmm_range_get_pages_done(struct hmm_range *hmm_range)
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{
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bool r;
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r = mmu_interval_read_retry(hmm_range->notifier,
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hmm_range->notifier_seq);
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kvfree(hmm_range->hmm_pfns);
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kfree(hmm_range);
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return r;
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}
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