181 lines
6.3 KiB
C
181 lines
6.3 KiB
C
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/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DAL_AUDIO_DCE_110_H__
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#define __DAL_AUDIO_DCE_110_H__
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#include "audio.h"
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#define AUD_COMMON_REG_LIST(id)\
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SRI(AZALIA_F0_CODEC_ENDPOINT_INDEX, AZF0ENDPOINT, id),\
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SRI(AZALIA_F0_CODEC_ENDPOINT_DATA, AZF0ENDPOINT, id),\
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SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS),\
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SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES),\
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SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES),\
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SR(DCCG_AUDIO_DTO_SOURCE),\
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SR(DCCG_AUDIO_DTO0_MODULE),\
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SR(DCCG_AUDIO_DTO0_PHASE),\
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SR(DCCG_AUDIO_DTO1_MODULE),\
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SR(DCCG_AUDIO_DTO1_PHASE)
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/* set field name */
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#define SF(reg_name, field_name, post_fix)\
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.field_name = reg_name ## __ ## field_name ## post_fix
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#define AUD_COMMON_MASK_SH_LIST_BASE(mask_sh)\
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SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL, mask_sh),\
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SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO_SEL, mask_sh),\
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SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO2_USE_512FBR_DTO, mask_sh),\
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SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_USE_512FBR_DTO, mask_sh),\
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SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO1_USE_512FBR_DTO, mask_sh),\
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SF(DCCG_AUDIO_DTO0_MODULE, DCCG_AUDIO_DTO0_MODULE, mask_sh),\
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SF(DCCG_AUDIO_DTO0_PHASE, DCCG_AUDIO_DTO0_PHASE, mask_sh),\
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SF(DCCG_AUDIO_DTO1_MODULE, DCCG_AUDIO_DTO1_MODULE, mask_sh),\
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SF(DCCG_AUDIO_DTO1_PHASE, DCCG_AUDIO_DTO1_PHASE, mask_sh),\
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SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES, AUDIO_RATE_CAPABILITIES, mask_sh),\
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SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, CLKSTOP, mask_sh),\
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SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, EPSS, mask_sh)
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#define AUD_COMMON_MASK_SH_LIST(mask_sh)\
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AUD_COMMON_MASK_SH_LIST_BASE(mask_sh),\
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SF(AZALIA_F0_CODEC_ENDPOINT_INDEX, AZALIA_ENDPOINT_REG_INDEX, mask_sh),\
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SF(AZALIA_F0_CODEC_ENDPOINT_DATA, AZALIA_ENDPOINT_REG_DATA, mask_sh)
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#if defined(CONFIG_DRM_AMD_DC_SI)
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#define AUD_DCE60_MASK_SH_LIST(mask_sh)\
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SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL, mask_sh),\
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SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO_SEL, mask_sh),\
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SF(DCCG_AUDIO_DTO0_MODULE, DCCG_AUDIO_DTO0_MODULE, mask_sh),\
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SF(DCCG_AUDIO_DTO0_PHASE, DCCG_AUDIO_DTO0_PHASE, mask_sh),\
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SF(DCCG_AUDIO_DTO1_MODULE, DCCG_AUDIO_DTO1_MODULE, mask_sh),\
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SF(DCCG_AUDIO_DTO1_PHASE, DCCG_AUDIO_DTO1_PHASE, mask_sh),\
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SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES, AUDIO_RATE_CAPABILITIES, mask_sh),\
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SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, CLKSTOP, mask_sh),\
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SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, EPSS, mask_sh), \
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SF(AZALIA_F0_CODEC_ENDPOINT_INDEX, AZALIA_ENDPOINT_REG_INDEX, mask_sh),\
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SF(AZALIA_F0_CODEC_ENDPOINT_DATA, AZALIA_ENDPOINT_REG_DATA, mask_sh)
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#endif
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struct dce_audio_registers {
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uint32_t AZALIA_F0_CODEC_ENDPOINT_INDEX;
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uint32_t AZALIA_F0_CODEC_ENDPOINT_DATA;
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uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS;
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uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES;
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uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES;
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uint32_t DCCG_AUDIO_DTO_SOURCE;
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uint32_t DCCG_AUDIO_DTO0_MODULE;
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uint32_t DCCG_AUDIO_DTO0_PHASE;
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uint32_t DCCG_AUDIO_DTO1_MODULE;
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uint32_t DCCG_AUDIO_DTO1_PHASE;
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uint32_t AUDIO_RATE_CAPABILITIES;
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};
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struct dce_audio_shift {
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uint8_t AZALIA_ENDPOINT_REG_INDEX;
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uint8_t AZALIA_ENDPOINT_REG_DATA;
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uint8_t AUDIO_RATE_CAPABILITIES;
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uint8_t CLKSTOP;
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uint8_t EPSS;
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uint8_t DCCG_AUDIO_DTO0_SOURCE_SEL;
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uint8_t DCCG_AUDIO_DTO_SEL;
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uint8_t DCCG_AUDIO_DTO0_MODULE;
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uint8_t DCCG_AUDIO_DTO0_PHASE;
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uint8_t DCCG_AUDIO_DTO1_MODULE;
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uint8_t DCCG_AUDIO_DTO1_PHASE;
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uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
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uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
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uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;
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uint32_t CLOCK_GATING_DISABLE;
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};
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struct dce_audio_mask {
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uint32_t AZALIA_ENDPOINT_REG_INDEX;
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uint32_t AZALIA_ENDPOINT_REG_DATA;
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uint32_t AUDIO_RATE_CAPABILITIES;
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uint32_t CLKSTOP;
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uint32_t EPSS;
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uint32_t DCCG_AUDIO_DTO0_SOURCE_SEL;
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uint32_t DCCG_AUDIO_DTO_SEL;
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uint32_t DCCG_AUDIO_DTO0_MODULE;
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uint32_t DCCG_AUDIO_DTO0_PHASE;
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uint32_t DCCG_AUDIO_DTO1_MODULE;
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uint32_t DCCG_AUDIO_DTO1_PHASE;
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uint32_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
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uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
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uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;
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uint32_t CLOCK_GATING_DISABLE;
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};
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struct dce_audio {
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struct audio base;
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const struct dce_audio_registers *regs;
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const struct dce_audio_shift *shifts;
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const struct dce_audio_mask *masks;
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};
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struct audio *dce_audio_create(
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struct dc_context *ctx,
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unsigned int inst,
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const struct dce_audio_registers *reg,
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const struct dce_audio_shift *shifts,
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const struct dce_audio_mask *masks);
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#if defined(CONFIG_DRM_AMD_DC_SI)
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struct audio *dce60_audio_create(
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struct dc_context *ctx,
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unsigned int inst,
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const struct dce_audio_registers *reg,
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const struct dce_audio_shift *shifts,
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const struct dce_audio_mask *masks);
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#endif
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void dce_aud_destroy(struct audio **audio);
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void dce_aud_hw_init(struct audio *audio);
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void dce_aud_az_enable(struct audio *audio);
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void dce_aud_az_disable(struct audio *audio);
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void dce_aud_az_configure(struct audio *audio,
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enum signal_type signal,
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const struct audio_crtc_info *crtc_info,
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const struct audio_info *audio_info);
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void dce_aud_wall_dto_setup(struct audio *audio,
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enum signal_type signal,
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const struct audio_crtc_info *crtc_info,
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const struct audio_pll_info *pll_info);
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#endif /*__DAL_AUDIO_DCE_110_H__*/
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