240 lines
11 KiB
C
240 lines
11 KiB
C
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/*
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* Copyright 2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "reg_helper.h"
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#include "resource.h"
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#include "mcif_wb.h"
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#include "dcn32_mmhubbub.h"
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#define REG(reg)\
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mcif_wb30->mcif_wb_regs->reg
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#define CTX \
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mcif_wb30->base.ctx
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#undef FN
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#define FN(reg_name, field_name) \
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mcif_wb30->mcif_wb_shift->field_name, mcif_wb30->mcif_wb_mask->field_name
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#define MCIF_ADDR(addr) (((unsigned long long)addr & 0xffffffffff) + 0xFE) >> 8
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#define MCIF_ADDR_HIGH(addr) (unsigned long long)addr >> 40
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/* wbif programming guide:
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* 1. set up wbif parameter:
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* unsigned long long luma_address[4]; //4 frame buffer
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* unsigned long long chroma_address[4];
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* unsigned int luma_pitch;
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* unsigned int chroma_pitch;
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* unsigned int warmup_pitch=0x10; //256B align, the page size is 4KB when it is 0x10
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* unsigned int slice_lines; //slice size
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* unsigned int time_per_pixel; // time per pixel, in ns
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* unsigned int arbitration_slice; // 0: 2048 bytes 1: 4096 bytes 2: 8192 Bytes
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* unsigned int max_scaled_time; // used for QOS generation
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* unsigned int swlock=0x0;
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* unsigned int cli_watermark[4]; //4 group urgent watermark
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* unsigned int pstate_watermark[4]; //4 group pstate watermark
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* unsigned int sw_int_en; // Software interrupt enable, frame end and overflow
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* unsigned int sw_slice_int_en; // slice end interrupt enable
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* unsigned int sw_overrun_int_en; // overrun error interrupt enable
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* unsigned int vce_int_en; // VCE interrupt enable, frame end and overflow
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* unsigned int vce_slice_int_en; // VCE slice end interrupt enable, frame end and overflow
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*
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* 2. configure wbif register
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* a. call mmhubbub_config_wbif()
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*
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* 3. Enable wbif
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* call set_wbif_bufmgr_enable();
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*
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* 4. wbif_dump_status(), option, for debug purpose
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* the bufmgr status can show the progress of write back, can be used for debug purpose
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*/
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static void mmhubbub32_warmup_mcif(struct mcif_wb *mcif_wb,
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struct mcif_warmup_params *params)
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{
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struct dcn30_mmhubbub *mcif_wb30 = TO_DCN30_MMHUBBUB(mcif_wb);
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union large_integer start_address_shift = {.quad_part = params->start_address.quad_part >> 5};
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/* Set base address and region size for warmup */
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REG_SET(MMHUBBUB_WARMUP_BASE_ADDR_HIGH, 0, MMHUBBUB_WARMUP_BASE_ADDR_HIGH, start_address_shift.high_part);
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REG_SET(MMHUBBUB_WARMUP_BASE_ADDR_LOW, 0, MMHUBBUB_WARMUP_BASE_ADDR_LOW, start_address_shift.low_part);
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REG_SET(MMHUBBUB_WARMUP_ADDR_REGION, 0, MMHUBBUB_WARMUP_ADDR_REGION, params->region_size >> 5);
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// REG_SET(MMHUBBUB_WARMUP_P_VMID, 0, MMHUBBUB_WARMUP_P_VMID, params->p_vmid);
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/* Set address increment and enable warmup */
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REG_SET_3(MMHUBBUB_WARMUP_CONTROL_STATUS, 0, MMHUBBUB_WARMUP_EN, true,
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MMHUBBUB_WARMUP_SW_INT_EN, true,
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MMHUBBUB_WARMUP_INC_ADDR, params->address_increment >> 5);
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/* Wait for an interrupt to signal warmup is completed */
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REG_WAIT(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_SW_INT_STATUS, 1, 20, 100);
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/* Acknowledge interrupt */
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REG_UPDATE(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_SW_INT_ACK, 1);
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/* Disable warmup */
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REG_UPDATE(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_EN, false);
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}
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static void mmhubbub32_config_mcif_buf(struct mcif_wb *mcif_wb,
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struct mcif_buf_params *params,
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unsigned int dest_height)
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{
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struct dcn30_mmhubbub *mcif_wb30 = TO_DCN30_MMHUBBUB(mcif_wb);
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/* buffer address for packing mode or Luma in planar mode */
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REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y, MCIF_WB_BUF_1_ADDR_Y, MCIF_ADDR(params->luma_address[0]));
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REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[0]));
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/* buffer address for Chroma in planar mode (unused in packing mode) */
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REG_UPDATE(MCIF_WB_BUF_1_ADDR_C, MCIF_WB_BUF_1_ADDR_C, MCIF_ADDR(params->chroma_address[0]));
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REG_UPDATE(MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_ADDR_HIGH(params->chroma_address[0]));
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/* buffer address for packing mode or Luma in planar mode */
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REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y, MCIF_WB_BUF_2_ADDR_Y, MCIF_ADDR(params->luma_address[1]));
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REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[1]));
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/* buffer address for Chroma in planar mode (unused in packing mode) */
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REG_UPDATE(MCIF_WB_BUF_2_ADDR_C, MCIF_WB_BUF_2_ADDR_C, MCIF_ADDR(params->chroma_address[1]));
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REG_UPDATE(MCIF_WB_BUF_2_ADDR_C_HIGH, MCIF_WB_BUF_2_ADDR_C_HIGH, MCIF_ADDR_HIGH(params->chroma_address[1]));
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/* buffer address for packing mode or Luma in planar mode */
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REG_UPDATE(MCIF_WB_BUF_3_ADDR_Y, MCIF_WB_BUF_3_ADDR_Y, MCIF_ADDR(params->luma_address[2]));
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REG_UPDATE(MCIF_WB_BUF_3_ADDR_Y_HIGH, MCIF_WB_BUF_3_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[2]));
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/* buffer address for Chroma in planar mode (unused in packing mode) */
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REG_UPDATE(MCIF_WB_BUF_3_ADDR_C, MCIF_WB_BUF_3_ADDR_C, MCIF_ADDR(params->chroma_address[2]));
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REG_UPDATE(MCIF_WB_BUF_3_ADDR_C_HIGH, MCIF_WB_BUF_3_ADDR_C_HIGH, MCIF_ADDR_HIGH(params->chroma_address[2]));
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/* buffer address for packing mode or Luma in planar mode */
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REG_UPDATE(MCIF_WB_BUF_4_ADDR_Y, MCIF_WB_BUF_4_ADDR_Y, MCIF_ADDR(params->luma_address[3]));
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REG_UPDATE(MCIF_WB_BUF_4_ADDR_Y_HIGH, MCIF_WB_BUF_4_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[3]));
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/* buffer address for Chroma in planar mode (unused in packing mode) */
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REG_UPDATE(MCIF_WB_BUF_4_ADDR_C, MCIF_WB_BUF_4_ADDR_C, MCIF_ADDR(params->chroma_address[3]));
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REG_UPDATE(MCIF_WB_BUF_4_ADDR_C_HIGH, MCIF_WB_BUF_4_ADDR_C_HIGH, MCIF_ADDR_HIGH(params->chroma_address[3]));
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/* setup luma & chroma size
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* should be enough to contain a whole frame Luma data,
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* the programmed value is frame buffer size [27:8], 256-byte aligned
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*/
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REG_UPDATE(MCIF_WB_BUF_LUMA_SIZE, MCIF_WB_BUF_LUMA_SIZE, (params->luma_pitch>>8) * dest_height);
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REG_UPDATE(MCIF_WB_BUF_CHROMA_SIZE, MCIF_WB_BUF_CHROMA_SIZE, (params->chroma_pitch>>8) * dest_height);
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/* enable address fence */
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REG_UPDATE(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUF_ADDR_FENCE_EN, 1);
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/* setup pitch, the programmed value is [15:8], 256B align */
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REG_UPDATE_2(MCIF_WB_BUF_PITCH, MCIF_WB_BUF_LUMA_PITCH, params->luma_pitch >> 8,
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MCIF_WB_BUF_CHROMA_PITCH, params->chroma_pitch >> 8);
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}
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static void mmhubbub32_config_mcif_arb(struct mcif_wb *mcif_wb,
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struct mcif_arb_params *params)
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{
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struct dcn30_mmhubbub *mcif_wb30 = TO_DCN30_MMHUBBUB(mcif_wb);
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/* Programmed by the video driver based on the CRTC timing (for DWB) */
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REG_UPDATE(MCIF_WB_ARBITRATION_CONTROL, MCIF_WB_TIME_PER_PIXEL, params->time_per_pixel);
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/* Programming dwb watermark */
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/* Watermark to generate urgent in MCIF_WB_CLI, value is determined by MCIF_WB_CLI_WATERMARK_MASK. */
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/* Program in ns. A formula will be provided in the pseudo code to calculate the value. */
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REG_UPDATE(MCIF_WB_WATERMARK, MCIF_WB_CLI_WATERMARK_MASK, 0x0);
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/* urgent_watermarkA */
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REG_UPDATE(MCIF_WB_WATERMARK, MCIF_WB_CLI_WATERMARK, params->cli_watermark[0]);
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REG_UPDATE(MCIF_WB_WATERMARK, MCIF_WB_CLI_WATERMARK_MASK, 0x1);
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/* urgent_watermarkB */
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REG_UPDATE(MCIF_WB_WATERMARK, MCIF_WB_CLI_WATERMARK, params->cli_watermark[1]);
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REG_UPDATE(MCIF_WB_WATERMARK, MCIF_WB_CLI_WATERMARK_MASK, 0x2);
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/* urgent_watermarkC */
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REG_UPDATE(MCIF_WB_WATERMARK, MCIF_WB_CLI_WATERMARK, params->cli_watermark[2]);
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REG_UPDATE(MCIF_WB_WATERMARK, MCIF_WB_CLI_WATERMARK_MASK, 0x3);
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/* urgent_watermarkD */
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REG_UPDATE(MCIF_WB_WATERMARK, MCIF_WB_CLI_WATERMARK, params->cli_watermark[3]);
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/* Programming nb pstate watermark */
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/* nbp_state_change_watermarkA */
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REG_UPDATE(MCIF_WB_NB_PSTATE_LATENCY_WATERMARK, NB_PSTATE_CHANGE_WATERMARK_MASK, 0x0);
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REG_UPDATE(MCIF_WB_NB_PSTATE_LATENCY_WATERMARK,
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NB_PSTATE_CHANGE_REFRESH_WATERMARK, params->pstate_watermark[0]);
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/* nbp_state_change_watermarkB */
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REG_UPDATE(MCIF_WB_NB_PSTATE_LATENCY_WATERMARK, NB_PSTATE_CHANGE_WATERMARK_MASK, 0x1);
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REG_UPDATE(MCIF_WB_NB_PSTATE_LATENCY_WATERMARK,
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NB_PSTATE_CHANGE_REFRESH_WATERMARK, params->pstate_watermark[1]);
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/* nbp_state_change_watermarkC */
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REG_UPDATE(MCIF_WB_NB_PSTATE_LATENCY_WATERMARK, NB_PSTATE_CHANGE_WATERMARK_MASK, 0x2);
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REG_UPDATE(MCIF_WB_NB_PSTATE_LATENCY_WATERMARK,
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NB_PSTATE_CHANGE_REFRESH_WATERMARK, params->pstate_watermark[2]);
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/* nbp_state_change_watermarkD */
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REG_UPDATE(MCIF_WB_NB_PSTATE_LATENCY_WATERMARK, NB_PSTATE_CHANGE_WATERMARK_MASK, 0x3);
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REG_UPDATE(MCIF_WB_NB_PSTATE_LATENCY_WATERMARK,
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NB_PSTATE_CHANGE_REFRESH_WATERMARK, params->pstate_watermark[3]);
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/* dram_speed_change_duration - register removed */
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//REG_UPDATE(MCIF_WB_DRAM_SPEED_CHANGE_DURATION_VBI,
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// MCIF_WB_DRAM_SPEED_CHANGE_DURATION_VBI, params->dram_speed_change_duration);
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/* max_scaled_time */
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REG_UPDATE(MULTI_LEVEL_QOS_CTRL, MAX_SCALED_TIME_TO_URGENT, params->max_scaled_time);
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/* slice_lines */
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REG_UPDATE(MCIF_WB_BUFMGR_VCE_CONTROL, MCIF_WB_BUFMGR_SLICE_SIZE, params->slice_lines-1);
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/* Set arbitration unit for Luma/Chroma */
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/* arb_unit=2 should be chosen for more efficiency */
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/* Arbitration size, 0: 2048 bytes 1: 4096 bytes 2: 8192 Bytes */
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REG_UPDATE(MCIF_WB_ARBITRATION_CONTROL, MCIF_WB_CLIENT_ARBITRATION_SLICE, params->arbitration_slice);
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}
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static const struct mcif_wb_funcs dcn32_mmhubbub_funcs = {
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.warmup_mcif = mmhubbub32_warmup_mcif,
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.enable_mcif = mmhubbub2_enable_mcif,
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.disable_mcif = mmhubbub2_disable_mcif,
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.config_mcif_buf = mmhubbub32_config_mcif_buf,
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.config_mcif_arb = mmhubbub32_config_mcif_arb,
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.config_mcif_irq = mmhubbub2_config_mcif_irq,
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.dump_frame = mcifwb2_dump_frame,
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};
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void dcn32_mmhubbub_construct(struct dcn30_mmhubbub *mcif_wb30,
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struct dc_context *ctx,
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const struct dcn30_mmhubbub_registers *mcif_wb_regs,
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const struct dcn30_mmhubbub_shift *mcif_wb_shift,
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const struct dcn30_mmhubbub_mask *mcif_wb_mask,
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int inst)
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{
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mcif_wb30->base.ctx = ctx;
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mcif_wb30->base.inst = inst;
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mcif_wb30->base.funcs = &dcn32_mmhubbub_funcs;
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mcif_wb30->mcif_wb_regs = mcif_wb_regs;
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mcif_wb30->mcif_wb_shift = mcif_wb_shift;
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mcif_wb30->mcif_wb_mask = mcif_wb_mask;
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}
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