351 lines
8.5 KiB
C
351 lines
8.5 KiB
C
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/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright 2012 Red Hat Inc
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*/
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#include <linux/dma-buf.h>
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#include <linux/highmem.h>
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#include <linux/dma-resv.h>
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#include <linux/module.h>
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#include <asm/smp.h>
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#include "gem/i915_gem_dmabuf.h"
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#include "i915_drv.h"
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#include "i915_gem_object.h"
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#include "i915_scatterlist.h"
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MODULE_IMPORT_NS(DMA_BUF);
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I915_SELFTEST_DECLARE(static bool force_different_devices;)
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static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)
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{
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return to_intel_bo(buf->priv);
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}
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static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attach,
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enum dma_data_direction dir)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(attach->dmabuf);
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struct sg_table *sgt;
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struct scatterlist *src, *dst;
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int ret, i;
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/*
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* Make a copy of the object's sgt, so that we can make an independent
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* mapping
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*/
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sgt = kmalloc(sizeof(*sgt), GFP_KERNEL);
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if (!sgt) {
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ret = -ENOMEM;
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goto err;
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}
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ret = sg_alloc_table(sgt, obj->mm.pages->orig_nents, GFP_KERNEL);
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if (ret)
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goto err_free;
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dst = sgt->sgl;
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for_each_sg(obj->mm.pages->sgl, src, obj->mm.pages->orig_nents, i) {
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sg_set_page(dst, sg_page(src), src->length, 0);
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dst = sg_next(dst);
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}
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ret = dma_map_sgtable(attach->dev, sgt, dir, DMA_ATTR_SKIP_CPU_SYNC);
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if (ret)
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goto err_free_sg;
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return sgt;
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err_free_sg:
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sg_free_table(sgt);
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err_free:
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kfree(sgt);
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err:
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return ERR_PTR(ret);
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}
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static int i915_gem_dmabuf_vmap(struct dma_buf *dma_buf,
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struct iosys_map *map)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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void *vaddr;
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vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
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if (IS_ERR(vaddr))
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return PTR_ERR(vaddr);
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iosys_map_set_vaddr(map, vaddr);
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return 0;
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}
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static void i915_gem_dmabuf_vunmap(struct dma_buf *dma_buf,
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struct iosys_map *map)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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i915_gem_object_flush_map(obj);
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i915_gem_object_unpin_map(obj);
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}
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static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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struct drm_i915_private *i915 = to_i915(obj->base.dev);
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int ret;
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dma_resv_assert_held(dma_buf->resv);
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if (obj->base.size < vma->vm_end - vma->vm_start)
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return -EINVAL;
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if (HAS_LMEM(i915))
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return drm_gem_prime_mmap(&obj->base, vma);
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if (!obj->base.filp)
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return -ENODEV;
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ret = call_mmap(obj->base.filp, vma);
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if (ret)
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return ret;
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vma_set_file(vma, obj->base.filp);
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return 0;
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}
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static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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bool write = (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE);
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struct i915_gem_ww_ctx ww;
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int err;
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i915_gem_ww_ctx_init(&ww, true);
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retry:
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err = i915_gem_object_lock(obj, &ww);
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if (!err)
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err = i915_gem_object_pin_pages(obj);
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if (!err) {
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err = i915_gem_object_set_to_cpu_domain(obj, write);
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i915_gem_object_unpin_pages(obj);
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}
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if (err == -EDEADLK) {
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err = i915_gem_ww_ctx_backoff(&ww);
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if (!err)
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goto retry;
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}
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i915_gem_ww_ctx_fini(&ww);
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return err;
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}
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static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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struct i915_gem_ww_ctx ww;
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int err;
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i915_gem_ww_ctx_init(&ww, true);
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retry:
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err = i915_gem_object_lock(obj, &ww);
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if (!err)
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err = i915_gem_object_pin_pages(obj);
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if (!err) {
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err = i915_gem_object_set_to_gtt_domain(obj, false);
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i915_gem_object_unpin_pages(obj);
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}
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if (err == -EDEADLK) {
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err = i915_gem_ww_ctx_backoff(&ww);
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if (!err)
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goto retry;
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}
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i915_gem_ww_ctx_fini(&ww);
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return err;
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}
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static int i915_gem_dmabuf_attach(struct dma_buf *dmabuf,
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struct dma_buf_attachment *attach)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dmabuf);
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struct i915_gem_ww_ctx ww;
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int err;
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if (!i915_gem_object_can_migrate(obj, INTEL_REGION_SMEM))
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return -EOPNOTSUPP;
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for_i915_gem_ww(&ww, err, true) {
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err = i915_gem_object_lock(obj, &ww);
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if (err)
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continue;
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err = i915_gem_object_migrate(obj, &ww, INTEL_REGION_SMEM);
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if (err)
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continue;
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err = i915_gem_object_wait_migration(obj, 0);
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if (err)
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continue;
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err = i915_gem_object_pin_pages(obj);
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}
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return err;
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}
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static void i915_gem_dmabuf_detach(struct dma_buf *dmabuf,
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struct dma_buf_attachment *attach)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dmabuf);
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i915_gem_object_unpin_pages(obj);
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}
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static const struct dma_buf_ops i915_dmabuf_ops = {
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.attach = i915_gem_dmabuf_attach,
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.detach = i915_gem_dmabuf_detach,
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.map_dma_buf = i915_gem_map_dma_buf,
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.unmap_dma_buf = drm_gem_unmap_dma_buf,
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.release = drm_gem_dmabuf_release,
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.mmap = i915_gem_dmabuf_mmap,
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.vmap = i915_gem_dmabuf_vmap,
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.vunmap = i915_gem_dmabuf_vunmap,
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.begin_cpu_access = i915_gem_begin_cpu_access,
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.end_cpu_access = i915_gem_end_cpu_access,
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};
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struct dma_buf *i915_gem_prime_export(struct drm_gem_object *gem_obj, int flags)
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{
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struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
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DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
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exp_info.ops = &i915_dmabuf_ops;
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exp_info.size = gem_obj->size;
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exp_info.flags = flags;
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exp_info.priv = gem_obj;
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exp_info.resv = obj->base.resv;
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if (obj->ops->dmabuf_export) {
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int ret = obj->ops->dmabuf_export(obj);
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if (ret)
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return ERR_PTR(ret);
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}
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return drm_gem_dmabuf_export(gem_obj->dev, &exp_info);
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}
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static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
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{
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struct drm_i915_private *i915 = to_i915(obj->base.dev);
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struct sg_table *sgt;
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assert_object_held(obj);
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sgt = dma_buf_map_attachment(obj->base.import_attach,
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DMA_BIDIRECTIONAL);
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if (IS_ERR(sgt))
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return PTR_ERR(sgt);
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/*
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* DG1 is special here since it still snoops transactions even with
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* CACHE_NONE. This is not the case with other HAS_SNOOP platforms. We
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* might need to revisit this as we add new discrete platforms.
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*
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* XXX: Consider doing a vmap flush or something, where possible.
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* Currently we just do a heavy handed wbinvd_on_all_cpus() here since
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* the underlying sg_table might not even point to struct pages, so we
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* can't just call drm_clflush_sg or similar, like we do elsewhere in
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* the driver.
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*/
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if (i915_gem_object_can_bypass_llc(obj) ||
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(!HAS_LLC(i915) && !IS_DG1(i915)))
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wbinvd_on_all_cpus();
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__i915_gem_object_set_pages(obj, sgt);
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return 0;
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}
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static void i915_gem_object_put_pages_dmabuf(struct drm_i915_gem_object *obj,
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struct sg_table *sgt)
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{
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dma_buf_unmap_attachment(obj->base.import_attach, sgt,
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DMA_BIDIRECTIONAL);
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}
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static const struct drm_i915_gem_object_ops i915_gem_object_dmabuf_ops = {
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.name = "i915_gem_object_dmabuf",
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.get_pages = i915_gem_object_get_pages_dmabuf,
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.put_pages = i915_gem_object_put_pages_dmabuf,
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};
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struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
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struct dma_buf *dma_buf)
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{
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static struct lock_class_key lock_class;
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struct dma_buf_attachment *attach;
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struct drm_i915_gem_object *obj;
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int ret;
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/* is this one of own objects? */
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if (dma_buf->ops == &i915_dmabuf_ops) {
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obj = dma_buf_to_obj(dma_buf);
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/* is it from our device? */
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if (obj->base.dev == dev &&
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!I915_SELFTEST_ONLY(force_different_devices)) {
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/*
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* Importing dmabuf exported from out own gem increases
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* refcount on gem itself instead of f_count of dmabuf.
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*/
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return &i915_gem_object_get(obj)->base;
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}
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}
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if (i915_gem_object_size_2big(dma_buf->size))
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return ERR_PTR(-E2BIG);
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/* need to attach */
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attach = dma_buf_attach(dma_buf, dev->dev);
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if (IS_ERR(attach))
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return ERR_CAST(attach);
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get_dma_buf(dma_buf);
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obj = i915_gem_object_alloc();
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if (!obj) {
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ret = -ENOMEM;
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goto fail_detach;
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}
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drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
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i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops, &lock_class,
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I915_BO_ALLOC_USER);
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obj->base.import_attach = attach;
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obj->base.resv = dma_buf->resv;
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/* We use GTT as shorthand for a coherent domain, one that is
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* neither in the GPU cache nor in the CPU cache, where all
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* writes are immediately visible in memory. (That's not strictly
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* true, but it's close! There are internal buffers such as the
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* write-combined buffer or a delay through the chipset for GTT
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* writes that do require us to treat GTT as a separate cache domain.)
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*/
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obj->read_domains = I915_GEM_DOMAIN_GTT;
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obj->write_domain = 0;
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return &obj->base;
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fail_detach:
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dma_buf_detach(dma_buf, attach);
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dma_buf_put(dma_buf);
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return ERR_PTR(ret);
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}
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#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
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#include "selftests/mock_dmabuf.c"
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#include "selftests/i915_gem_dmabuf.c"
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#endif
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