176 lines
5.3 KiB
C
176 lines
5.3 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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* Copyright (c) 2014, Inforce Computing. All rights reserved.
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*
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* Author: Vinay Simha <vinaysimha@inforcecomputing.com>
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*/
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#include <drm/drm_crtc.h>
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#include <drm/drm_probe_helper.h>
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#include "mdp4_kms.h"
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#ifdef CONFIG_DRM_MSM_DSI
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struct mdp4_dsi_encoder {
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struct drm_encoder base;
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struct drm_panel *panel;
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bool enabled;
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};
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#define to_mdp4_dsi_encoder(x) container_of(x, struct mdp4_dsi_encoder, base)
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static struct mdp4_kms *get_kms(struct drm_encoder *encoder)
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{
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struct msm_drm_private *priv = encoder->dev->dev_private;
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return to_mdp4_kms(to_mdp_kms(priv->kms));
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}
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static void mdp4_dsi_encoder_destroy(struct drm_encoder *encoder)
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{
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struct mdp4_dsi_encoder *mdp4_dsi_encoder = to_mdp4_dsi_encoder(encoder);
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drm_encoder_cleanup(encoder);
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kfree(mdp4_dsi_encoder);
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}
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static const struct drm_encoder_funcs mdp4_dsi_encoder_funcs = {
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.destroy = mdp4_dsi_encoder_destroy,
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};
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static void mdp4_dsi_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct mdp4_kms *mdp4_kms = get_kms(encoder);
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uint32_t dsi_hsync_skew, vsync_period, vsync_len, ctrl_pol;
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uint32_t display_v_start, display_v_end;
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uint32_t hsync_start_x, hsync_end_x;
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mode = adjusted_mode;
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DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
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ctrl_pol = 0;
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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ctrl_pol |= MDP4_DSI_CTRL_POLARITY_HSYNC_LOW;
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if (mode->flags & DRM_MODE_FLAG_NVSYNC)
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ctrl_pol |= MDP4_DSI_CTRL_POLARITY_VSYNC_LOW;
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/* probably need to get DATA_EN polarity from panel.. */
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dsi_hsync_skew = 0; /* get this from panel? */
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hsync_start_x = (mode->htotal - mode->hsync_start);
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hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1;
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vsync_period = mode->vtotal * mode->htotal;
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vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal;
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display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dsi_hsync_skew;
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display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dsi_hsync_skew - 1;
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mdp4_write(mdp4_kms, REG_MDP4_DSI_HSYNC_CTRL,
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MDP4_DSI_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) |
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MDP4_DSI_HSYNC_CTRL_PERIOD(mode->htotal));
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mdp4_write(mdp4_kms, REG_MDP4_DSI_VSYNC_PERIOD, vsync_period);
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mdp4_write(mdp4_kms, REG_MDP4_DSI_VSYNC_LEN, vsync_len);
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mdp4_write(mdp4_kms, REG_MDP4_DSI_DISPLAY_HCTRL,
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MDP4_DSI_DISPLAY_HCTRL_START(hsync_start_x) |
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MDP4_DSI_DISPLAY_HCTRL_END(hsync_end_x));
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mdp4_write(mdp4_kms, REG_MDP4_DSI_DISPLAY_VSTART, display_v_start);
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mdp4_write(mdp4_kms, REG_MDP4_DSI_DISPLAY_VEND, display_v_end);
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mdp4_write(mdp4_kms, REG_MDP4_DSI_CTRL_POLARITY, ctrl_pol);
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mdp4_write(mdp4_kms, REG_MDP4_DSI_UNDERFLOW_CLR,
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MDP4_DSI_UNDERFLOW_CLR_ENABLE_RECOVERY |
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MDP4_DSI_UNDERFLOW_CLR_COLOR(0xff));
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mdp4_write(mdp4_kms, REG_MDP4_DSI_ACTIVE_HCTL,
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MDP4_DSI_ACTIVE_HCTL_START(0) |
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MDP4_DSI_ACTIVE_HCTL_END(0));
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mdp4_write(mdp4_kms, REG_MDP4_DSI_HSYNC_SKEW, dsi_hsync_skew);
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mdp4_write(mdp4_kms, REG_MDP4_DSI_BORDER_CLR, 0);
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mdp4_write(mdp4_kms, REG_MDP4_DSI_ACTIVE_VSTART, 0);
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mdp4_write(mdp4_kms, REG_MDP4_DSI_ACTIVE_VEND, 0);
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}
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static void mdp4_dsi_encoder_disable(struct drm_encoder *encoder)
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{
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struct mdp4_dsi_encoder *mdp4_dsi_encoder = to_mdp4_dsi_encoder(encoder);
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struct mdp4_kms *mdp4_kms = get_kms(encoder);
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if (!mdp4_dsi_encoder->enabled)
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return;
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mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0);
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/*
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* Wait for a vsync so we know the ENABLE=0 latched before
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* the (connector) source of the vsync's gets disabled,
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* otherwise we end up in a funny state if we re-enable
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* before the disable latches, which results that some of
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* the settings changes for the new modeset (like new
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* scanout buffer) don't latch properly..
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*/
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mdp_irq_wait(&mdp4_kms->base, MDP4_IRQ_PRIMARY_VSYNC);
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mdp4_dsi_encoder->enabled = false;
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}
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static void mdp4_dsi_encoder_enable(struct drm_encoder *encoder)
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{
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struct mdp4_dsi_encoder *mdp4_dsi_encoder = to_mdp4_dsi_encoder(encoder);
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struct mdp4_kms *mdp4_kms = get_kms(encoder);
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if (mdp4_dsi_encoder->enabled)
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return;
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mdp4_crtc_set_config(encoder->crtc,
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MDP4_DMA_CONFIG_PACK_ALIGN_MSB |
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MDP4_DMA_CONFIG_DEFLKR_EN |
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MDP4_DMA_CONFIG_DITHER_EN |
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MDP4_DMA_CONFIG_R_BPC(BPC8) |
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MDP4_DMA_CONFIG_G_BPC(BPC8) |
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MDP4_DMA_CONFIG_B_BPC(BPC8) |
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MDP4_DMA_CONFIG_PACK(0x21));
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mdp4_crtc_set_intf(encoder->crtc, INTF_DSI_VIDEO, 0);
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mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 1);
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mdp4_dsi_encoder->enabled = true;
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}
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static const struct drm_encoder_helper_funcs mdp4_dsi_encoder_helper_funcs = {
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.mode_set = mdp4_dsi_encoder_mode_set,
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.disable = mdp4_dsi_encoder_disable,
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.enable = mdp4_dsi_encoder_enable,
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};
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/* initialize encoder */
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struct drm_encoder *mdp4_dsi_encoder_init(struct drm_device *dev)
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{
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struct drm_encoder *encoder = NULL;
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struct mdp4_dsi_encoder *mdp4_dsi_encoder;
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int ret;
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mdp4_dsi_encoder = kzalloc(sizeof(*mdp4_dsi_encoder), GFP_KERNEL);
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if (!mdp4_dsi_encoder) {
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ret = -ENOMEM;
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goto fail;
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}
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encoder = &mdp4_dsi_encoder->base;
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drm_encoder_init(dev, encoder, &mdp4_dsi_encoder_funcs,
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DRM_MODE_ENCODER_DSI, NULL);
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drm_encoder_helper_add(encoder, &mdp4_dsi_encoder_helper_funcs);
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return encoder;
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fail:
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if (encoder)
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mdp4_dsi_encoder_destroy(encoder);
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return ERR_PTR(ret);
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}
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#endif /* CONFIG_DRM_MSM_DSI */
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