542 lines
13 KiB
C
542 lines
13 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
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*/
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#include <linux/delay.h>
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#include <drm/drm_print.h>
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#include "dp_reg.h"
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#include "dp_aux.h"
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enum msm_dp_aux_err {
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DP_AUX_ERR_NONE,
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DP_AUX_ERR_ADDR,
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DP_AUX_ERR_TOUT,
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DP_AUX_ERR_NACK,
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DP_AUX_ERR_DEFER,
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DP_AUX_ERR_NACK_DEFER,
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DP_AUX_ERR_PHY,
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};
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struct dp_aux_private {
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struct device *dev;
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struct dp_catalog *catalog;
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struct mutex mutex;
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struct completion comp;
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enum msm_dp_aux_err aux_error_num;
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u32 retry_cnt;
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bool cmd_busy;
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bool native;
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bool read;
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bool no_send_addr;
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bool no_send_stop;
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bool initted;
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bool is_edp;
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u32 offset;
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u32 segment;
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struct drm_dp_aux dp_aux;
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};
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#define MAX_AUX_RETRIES 5
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static ssize_t dp_aux_write(struct dp_aux_private *aux,
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struct drm_dp_aux_msg *msg)
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{
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u8 data[4];
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u32 reg;
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ssize_t len;
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u8 *msgdata = msg->buffer;
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int const AUX_CMD_FIFO_LEN = 128;
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int i = 0;
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if (aux->read)
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len = 0;
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else
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len = msg->size;
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/*
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* cmd fifo only has depth of 144 bytes
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* limit buf length to 128 bytes here
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*/
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if (len > AUX_CMD_FIFO_LEN - 4) {
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DRM_ERROR("buf size greater than allowed size of 128 bytes\n");
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return -EINVAL;
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}
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/* Pack cmd and write to HW */
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data[0] = (msg->address >> 16) & 0xf; /* addr[19:16] */
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if (aux->read)
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data[0] |= BIT(4); /* R/W */
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data[1] = msg->address >> 8; /* addr[15:8] */
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data[2] = msg->address; /* addr[7:0] */
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data[3] = msg->size - 1; /* len[7:0] */
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for (i = 0; i < len + 4; i++) {
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reg = (i < 4) ? data[i] : msgdata[i - 4];
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reg <<= DP_AUX_DATA_OFFSET;
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reg &= DP_AUX_DATA_MASK;
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reg |= DP_AUX_DATA_WRITE;
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/* index = 0, write */
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if (i == 0)
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reg |= DP_AUX_DATA_INDEX_WRITE;
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aux->catalog->aux_data = reg;
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dp_catalog_aux_write_data(aux->catalog);
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}
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dp_catalog_aux_clear_trans(aux->catalog, false);
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dp_catalog_aux_clear_hw_interrupts(aux->catalog);
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reg = 0; /* Transaction number == 1 */
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if (!aux->native) { /* i2c */
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reg |= DP_AUX_TRANS_CTRL_I2C;
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if (aux->no_send_addr)
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reg |= DP_AUX_TRANS_CTRL_NO_SEND_ADDR;
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if (aux->no_send_stop)
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reg |= DP_AUX_TRANS_CTRL_NO_SEND_STOP;
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}
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reg |= DP_AUX_TRANS_CTRL_GO;
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aux->catalog->aux_data = reg;
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dp_catalog_aux_write_trans(aux->catalog);
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return len;
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}
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static ssize_t dp_aux_cmd_fifo_tx(struct dp_aux_private *aux,
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struct drm_dp_aux_msg *msg)
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{
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ssize_t ret;
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unsigned long time_left;
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reinit_completion(&aux->comp);
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ret = dp_aux_write(aux, msg);
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if (ret < 0)
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return ret;
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time_left = wait_for_completion_timeout(&aux->comp,
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msecs_to_jiffies(250));
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if (!time_left)
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return -ETIMEDOUT;
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return ret;
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}
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static ssize_t dp_aux_cmd_fifo_rx(struct dp_aux_private *aux,
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struct drm_dp_aux_msg *msg)
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{
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u32 data;
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u8 *dp;
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u32 i, actual_i;
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u32 len = msg->size;
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dp_catalog_aux_clear_trans(aux->catalog, true);
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data = DP_AUX_DATA_INDEX_WRITE; /* INDEX_WRITE */
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data |= DP_AUX_DATA_READ; /* read */
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aux->catalog->aux_data = data;
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dp_catalog_aux_write_data(aux->catalog);
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dp = msg->buffer;
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/* discard first byte */
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data = dp_catalog_aux_read_data(aux->catalog);
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for (i = 0; i < len; i++) {
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data = dp_catalog_aux_read_data(aux->catalog);
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*dp++ = (u8)((data >> DP_AUX_DATA_OFFSET) & 0xff);
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actual_i = (data >> DP_AUX_DATA_INDEX_OFFSET) & 0xFF;
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if (i != actual_i)
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break;
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}
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return i;
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}
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static void dp_aux_update_offset_and_segment(struct dp_aux_private *aux,
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struct drm_dp_aux_msg *input_msg)
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{
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u32 edid_address = 0x50;
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u32 segment_address = 0x30;
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bool i2c_read = input_msg->request &
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(DP_AUX_I2C_READ & DP_AUX_NATIVE_READ);
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u8 *data;
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if (aux->native || i2c_read || ((input_msg->address != edid_address) &&
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(input_msg->address != segment_address)))
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return;
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data = input_msg->buffer;
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if (input_msg->address == segment_address)
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aux->segment = *data;
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else
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aux->offset = *data;
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}
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/**
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* dp_aux_transfer_helper() - helper function for EDID read transactions
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*
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* @aux: DP AUX private structure
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* @input_msg: input message from DRM upstream APIs
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* @send_seg: send the segment to sink
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*
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* return: void
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*
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* This helper function is used to fix EDID reads for non-compliant
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* sinks that do not handle the i2c middle-of-transaction flag correctly.
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*/
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static void dp_aux_transfer_helper(struct dp_aux_private *aux,
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struct drm_dp_aux_msg *input_msg,
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bool send_seg)
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{
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struct drm_dp_aux_msg helper_msg;
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u32 message_size = 0x10;
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u32 segment_address = 0x30;
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u32 const edid_block_length = 0x80;
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bool i2c_mot = input_msg->request & DP_AUX_I2C_MOT;
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bool i2c_read = input_msg->request &
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(DP_AUX_I2C_READ & DP_AUX_NATIVE_READ);
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if (!i2c_mot || !i2c_read || (input_msg->size == 0))
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return;
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/*
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* Sending the segment value and EDID offset will be performed
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* from the DRM upstream EDID driver for each block. Avoid
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* duplicate AUX transactions related to this while reading the
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* first 16 bytes of each block.
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*/
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if (!(aux->offset % edid_block_length) || !send_seg)
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goto end;
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aux->read = false;
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aux->cmd_busy = true;
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aux->no_send_addr = true;
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aux->no_send_stop = true;
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/*
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* Send the segment address for every i2c read in which the
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* middle-of-tranaction flag is set. This is required to support EDID
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* reads of more than 2 blocks as the segment address is reset to 0
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* since we are overriding the middle-of-transaction flag for read
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* transactions.
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*/
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if (aux->segment) {
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memset(&helper_msg, 0, sizeof(helper_msg));
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helper_msg.address = segment_address;
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helper_msg.buffer = &aux->segment;
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helper_msg.size = 1;
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dp_aux_cmd_fifo_tx(aux, &helper_msg);
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}
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/*
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* Send the offset address for every i2c read in which the
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* middle-of-transaction flag is set. This will ensure that the sink
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* will update its read pointer and return the correct portion of the
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* EDID buffer in the subsequent i2c read trasntion triggered in the
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* native AUX transfer function.
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*/
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memset(&helper_msg, 0, sizeof(helper_msg));
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helper_msg.address = input_msg->address;
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helper_msg.buffer = &aux->offset;
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helper_msg.size = 1;
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dp_aux_cmd_fifo_tx(aux, &helper_msg);
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end:
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aux->offset += message_size;
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if (aux->offset == 0x80 || aux->offset == 0x100)
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aux->segment = 0x0; /* reset segment at end of block */
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}
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/*
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* This function does the real job to process an AUX transaction.
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* It will call aux_reset() function to reset the AUX channel,
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* if the waiting is timeout.
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*/
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static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
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struct drm_dp_aux_msg *msg)
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{
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ssize_t ret;
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int const aux_cmd_native_max = 16;
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int const aux_cmd_i2c_max = 128;
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struct dp_aux_private *aux;
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aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
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aux->native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ);
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/* Ignore address only message */
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if (msg->size == 0 || !msg->buffer) {
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msg->reply = aux->native ?
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DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY_ACK;
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return msg->size;
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}
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/* msg sanity check */
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if ((aux->native && msg->size > aux_cmd_native_max) ||
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msg->size > aux_cmd_i2c_max) {
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DRM_ERROR("%s: invalid msg: size(%zu), request(%x)\n",
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__func__, msg->size, msg->request);
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return -EINVAL;
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}
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mutex_lock(&aux->mutex);
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if (!aux->initted) {
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ret = -EIO;
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goto exit;
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}
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/*
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* For eDP it's important to give a reasonably long wait here for HPD
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* to be asserted. This is because the panel driver may have _just_
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* turned on the panel and then tried to do an AUX transfer. The panel
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* driver has no way of knowing when the panel is ready, so it's up
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* to us to wait. For DP we never get into this situation so let's
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* avoid ever doing the extra long wait for DP.
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*/
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if (aux->is_edp) {
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ret = dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog);
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if (ret) {
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DRM_DEBUG_DP("Panel not ready for aux transactions\n");
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goto exit;
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}
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}
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dp_aux_update_offset_and_segment(aux, msg);
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dp_aux_transfer_helper(aux, msg, true);
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aux->read = msg->request & (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ);
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aux->cmd_busy = true;
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if (aux->read) {
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aux->no_send_addr = true;
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aux->no_send_stop = false;
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} else {
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aux->no_send_addr = true;
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aux->no_send_stop = true;
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}
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ret = dp_aux_cmd_fifo_tx(aux, msg);
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if (ret < 0) {
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if (aux->native) {
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aux->retry_cnt++;
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if (!(aux->retry_cnt % MAX_AUX_RETRIES))
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dp_catalog_aux_update_cfg(aux->catalog);
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}
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/* reset aux if link is in connected state */
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if (dp_catalog_link_is_connected(aux->catalog))
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dp_catalog_aux_reset(aux->catalog);
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} else {
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aux->retry_cnt = 0;
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switch (aux->aux_error_num) {
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case DP_AUX_ERR_NONE:
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if (aux->read)
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ret = dp_aux_cmd_fifo_rx(aux, msg);
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msg->reply = aux->native ? DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY_ACK;
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break;
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case DP_AUX_ERR_DEFER:
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msg->reply = aux->native ? DP_AUX_NATIVE_REPLY_DEFER : DP_AUX_I2C_REPLY_DEFER;
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break;
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case DP_AUX_ERR_PHY:
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case DP_AUX_ERR_ADDR:
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case DP_AUX_ERR_NACK:
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case DP_AUX_ERR_NACK_DEFER:
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msg->reply = aux->native ? DP_AUX_NATIVE_REPLY_NACK : DP_AUX_I2C_REPLY_NACK;
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break;
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case DP_AUX_ERR_TOUT:
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ret = -ETIMEDOUT;
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break;
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}
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}
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aux->cmd_busy = false;
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exit:
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mutex_unlock(&aux->mutex);
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return ret;
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}
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void dp_aux_isr(struct drm_dp_aux *dp_aux)
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{
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u32 isr;
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struct dp_aux_private *aux;
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if (!dp_aux) {
|
||
|
|
DRM_ERROR("invalid input\n");
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
|
||
|
|
|
||
|
|
isr = dp_catalog_aux_get_irq(aux->catalog);
|
||
|
|
|
||
|
|
/* no interrupts pending, return immediately */
|
||
|
|
if (!isr)
|
||
|
|
return;
|
||
|
|
|
||
|
|
if (!aux->cmd_busy) {
|
||
|
|
DRM_ERROR("Unexpected DP AUX IRQ %#010x when not busy\n", isr);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*
|
||
|
|
* The logic below assumes only one error bit is set (other than "done"
|
||
|
|
* which can apparently be set at the same time as some of the other
|
||
|
|
* bits). Warn if more than one get set so we know we need to improve
|
||
|
|
* the logic.
|
||
|
|
*/
|
||
|
|
if (hweight32(isr & ~DP_INTR_AUX_XFER_DONE) > 1)
|
||
|
|
DRM_WARN("Some DP AUX interrupts unhandled: %#010x\n", isr);
|
||
|
|
|
||
|
|
if (isr & DP_INTR_AUX_ERROR) {
|
||
|
|
aux->aux_error_num = DP_AUX_ERR_PHY;
|
||
|
|
dp_catalog_aux_clear_hw_interrupts(aux->catalog);
|
||
|
|
} else if (isr & DP_INTR_NACK_DEFER) {
|
||
|
|
aux->aux_error_num = DP_AUX_ERR_NACK_DEFER;
|
||
|
|
} else if (isr & DP_INTR_WRONG_ADDR) {
|
||
|
|
aux->aux_error_num = DP_AUX_ERR_ADDR;
|
||
|
|
} else if (isr & DP_INTR_TIMEOUT) {
|
||
|
|
aux->aux_error_num = DP_AUX_ERR_TOUT;
|
||
|
|
} else if (!aux->native && (isr & DP_INTR_I2C_NACK)) {
|
||
|
|
aux->aux_error_num = DP_AUX_ERR_NACK;
|
||
|
|
} else if (!aux->native && (isr & DP_INTR_I2C_DEFER)) {
|
||
|
|
if (isr & DP_INTR_AUX_XFER_DONE)
|
||
|
|
aux->aux_error_num = DP_AUX_ERR_NACK;
|
||
|
|
else
|
||
|
|
aux->aux_error_num = DP_AUX_ERR_DEFER;
|
||
|
|
} else if (isr & DP_INTR_AUX_XFER_DONE) {
|
||
|
|
aux->aux_error_num = DP_AUX_ERR_NONE;
|
||
|
|
} else {
|
||
|
|
DRM_WARN("Unexpected interrupt: %#010x\n", isr);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
complete(&aux->comp);
|
||
|
|
}
|
||
|
|
|
||
|
|
void dp_aux_reconfig(struct drm_dp_aux *dp_aux)
|
||
|
|
{
|
||
|
|
struct dp_aux_private *aux;
|
||
|
|
|
||
|
|
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
|
||
|
|
|
||
|
|
dp_catalog_aux_update_cfg(aux->catalog);
|
||
|
|
dp_catalog_aux_reset(aux->catalog);
|
||
|
|
}
|
||
|
|
|
||
|
|
void dp_aux_init(struct drm_dp_aux *dp_aux)
|
||
|
|
{
|
||
|
|
struct dp_aux_private *aux;
|
||
|
|
|
||
|
|
if (!dp_aux) {
|
||
|
|
DRM_ERROR("invalid input\n");
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
|
||
|
|
|
||
|
|
mutex_lock(&aux->mutex);
|
||
|
|
|
||
|
|
dp_catalog_aux_enable(aux->catalog, true);
|
||
|
|
aux->retry_cnt = 0;
|
||
|
|
aux->initted = true;
|
||
|
|
|
||
|
|
mutex_unlock(&aux->mutex);
|
||
|
|
}
|
||
|
|
|
||
|
|
void dp_aux_deinit(struct drm_dp_aux *dp_aux)
|
||
|
|
{
|
||
|
|
struct dp_aux_private *aux;
|
||
|
|
|
||
|
|
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
|
||
|
|
|
||
|
|
mutex_lock(&aux->mutex);
|
||
|
|
|
||
|
|
aux->initted = false;
|
||
|
|
dp_catalog_aux_enable(aux->catalog, false);
|
||
|
|
|
||
|
|
mutex_unlock(&aux->mutex);
|
||
|
|
}
|
||
|
|
|
||
|
|
int dp_aux_register(struct drm_dp_aux *dp_aux)
|
||
|
|
{
|
||
|
|
struct dp_aux_private *aux;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
if (!dp_aux) {
|
||
|
|
DRM_ERROR("invalid input\n");
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
|
||
|
|
|
||
|
|
aux->dp_aux.name = "dpu_dp_aux";
|
||
|
|
aux->dp_aux.dev = aux->dev;
|
||
|
|
aux->dp_aux.transfer = dp_aux_transfer;
|
||
|
|
ret = drm_dp_aux_register(&aux->dp_aux);
|
||
|
|
if (ret) {
|
||
|
|
DRM_ERROR("%s: failed to register drm aux: %d\n", __func__,
|
||
|
|
ret);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
void dp_aux_unregister(struct drm_dp_aux *dp_aux)
|
||
|
|
{
|
||
|
|
drm_dp_aux_unregister(dp_aux);
|
||
|
|
}
|
||
|
|
|
||
|
|
struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog,
|
||
|
|
bool is_edp)
|
||
|
|
{
|
||
|
|
struct dp_aux_private *aux;
|
||
|
|
|
||
|
|
if (!catalog) {
|
||
|
|
DRM_ERROR("invalid input\n");
|
||
|
|
return ERR_PTR(-ENODEV);
|
||
|
|
}
|
||
|
|
|
||
|
|
aux = devm_kzalloc(dev, sizeof(*aux), GFP_KERNEL);
|
||
|
|
if (!aux)
|
||
|
|
return ERR_PTR(-ENOMEM);
|
||
|
|
|
||
|
|
init_completion(&aux->comp);
|
||
|
|
aux->cmd_busy = false;
|
||
|
|
aux->is_edp = is_edp;
|
||
|
|
mutex_init(&aux->mutex);
|
||
|
|
|
||
|
|
aux->dev = dev;
|
||
|
|
aux->catalog = catalog;
|
||
|
|
aux->retry_cnt = 0;
|
||
|
|
|
||
|
|
return &aux->dp_aux;
|
||
|
|
}
|
||
|
|
|
||
|
|
void dp_aux_put(struct drm_dp_aux *dp_aux)
|
||
|
|
{
|
||
|
|
struct dp_aux_private *aux;
|
||
|
|
|
||
|
|
if (!dp_aux)
|
||
|
|
return;
|
||
|
|
|
||
|
|
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
|
||
|
|
|
||
|
|
mutex_destroy(&aux->mutex);
|
||
|
|
|
||
|
|
devm_kfree(aux->dev, aux);
|
||
|
|
}
|