567 lines
16 KiB
C
567 lines
16 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#ifndef __MSM_DRV_H__
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#define __MSM_DRV_H__
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/cpufreq.h>
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#include <linux/devfreq.h>
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#include <linux/module.h>
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#include <linux/component.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/iommu.h>
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#include <linux/types.h>
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#include <linux/of_graph.h>
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#include <linux/of_device.h>
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#include <linux/sizes.h>
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#include <linux/kthread.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/display/drm_dsc.h>
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#include <drm/msm_drm.h>
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#include <drm/drm_gem.h>
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#ifdef CONFIG_FAULT_INJECTION
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extern struct fault_attr fail_gem_alloc;
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extern struct fault_attr fail_gem_iova;
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#else
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# define should_fail(attr, size) 0
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#endif
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struct msm_kms;
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struct msm_gpu;
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struct msm_mmu;
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struct msm_mdss;
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struct msm_rd_state;
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struct msm_perf_state;
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struct msm_gem_submit;
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struct msm_fence_context;
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struct msm_gem_address_space;
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struct msm_gem_vma;
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struct msm_disp_state;
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#define MAX_CRTCS 8
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#define MAX_BRIDGES 8
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#define FRAC_16_16(mult, div) (((mult) << 16) / (div))
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enum msm_dp_controller {
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MSM_DP_CONTROLLER_0,
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MSM_DP_CONTROLLER_1,
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MSM_DP_CONTROLLER_2,
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MSM_DP_CONTROLLER_3,
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MSM_DP_CONTROLLER_COUNT,
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};
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#define MSM_GPU_MAX_RINGS 4
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#define MAX_H_TILES_PER_DISPLAY 2
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/**
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* enum msm_event_wait - type of HW events to wait for
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* @MSM_ENC_COMMIT_DONE - wait for the driver to flush the registers to HW
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* @MSM_ENC_TX_COMPLETE - wait for the HW to transfer the frame to panel
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* @MSM_ENC_VBLANK - wait for the HW VBLANK event (for driver-internal waiters)
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*/
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enum msm_event_wait {
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MSM_ENC_COMMIT_DONE = 0,
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MSM_ENC_TX_COMPLETE,
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MSM_ENC_VBLANK,
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};
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/**
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* struct msm_display_topology - defines a display topology pipeline
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* @num_lm: number of layer mixers used
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* @num_intf: number of interfaces the panel is mounted on
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* @num_dspp: number of dspp blocks used
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* @num_dsc: number of Display Stream Compression (DSC) blocks used
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*/
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struct msm_display_topology {
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u32 num_lm;
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u32 num_intf;
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u32 num_dspp;
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u32 num_dsc;
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};
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/* Commit/Event thread specific structure */
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struct msm_drm_thread {
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struct drm_device *dev;
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unsigned int crtc_id;
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struct kthread_worker *worker;
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};
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struct msm_drm_private {
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struct drm_device *dev;
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struct msm_kms *kms;
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int (*kms_init)(struct drm_device *dev);
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/* subordinate devices, if present: */
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struct platform_device *gpu_pdev;
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/* possibly this should be in the kms component, but it is
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* shared by both mdp4 and mdp5..
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*/
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struct hdmi *hdmi;
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/* DSI is shared by mdp4 and mdp5 */
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struct msm_dsi *dsi[2];
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struct msm_dp *dp[MSM_DP_CONTROLLER_COUNT];
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/* when we have more than one 'msm_gpu' these need to be an array: */
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struct msm_gpu *gpu;
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/* gpu is only set on open(), but we need this info earlier */
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bool is_a2xx;
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bool has_cached_coherent;
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struct drm_fb_helper *fbdev;
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struct msm_rd_state *rd; /* debugfs to dump all submits */
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struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */
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struct msm_perf_state *perf;
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/**
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* List of all GEM objects (mainly for debugfs, protected by obj_lock
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* (acquire before per GEM object lock)
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*/
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struct list_head objects;
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struct mutex obj_lock;
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/**
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* lru:
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*
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* The various LRU's that a GEM object is in at various stages of
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* it's lifetime. Objects start out in the unbacked LRU. When
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* pinned (for scannout or permanently mapped GPU buffers, like
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* ringbuffer, memptr, fw, etc) it moves to the pinned LRU. When
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* unpinned, it moves into willneed or dontneed LRU depending on
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* madvise state. When backing pages are evicted (willneed) or
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* purged (dontneed) it moves back into the unbacked LRU.
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*
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* The dontneed LRU is considered by the shrinker for objects
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* that are candidate for purging, and the willneed LRU is
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* considered for objects that could be evicted.
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*/
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struct {
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/**
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* unbacked:
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*
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* The LRU for GEM objects without backing pages allocated.
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* This mostly exists so that objects are always is one
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* LRU.
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*/
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struct drm_gem_lru unbacked;
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/**
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* pinned:
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*
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* The LRU for pinned GEM objects
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*/
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struct drm_gem_lru pinned;
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/**
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* willneed:
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*
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* The LRU for unpinned GEM objects which are in madvise
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* WILLNEED state (ie. can be evicted)
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*/
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struct drm_gem_lru willneed;
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/**
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* dontneed:
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*
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* The LRU for unpinned GEM objects which are in madvise
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* DONTNEED state (ie. can be purged)
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*/
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struct drm_gem_lru dontneed;
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/**
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* lock:
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*
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* Protects manipulation of all of the LRUs.
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*/
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struct mutex lock;
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} lru;
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struct workqueue_struct *wq;
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unsigned int num_crtcs;
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struct drm_crtc *crtcs[MAX_CRTCS];
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struct msm_drm_thread event_thread[MAX_CRTCS];
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unsigned int num_bridges;
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struct drm_bridge *bridges[MAX_BRIDGES];
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/* VRAM carveout, used when no IOMMU: */
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struct {
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unsigned long size;
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dma_addr_t paddr;
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/* NOTE: mm managed at the page level, size is in # of pages
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* and position mm_node->start is in # of pages:
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*/
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struct drm_mm mm;
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spinlock_t lock; /* Protects drm_mm node allocation/removal */
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} vram;
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struct notifier_block vmap_notifier;
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struct shrinker shrinker;
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struct drm_atomic_state *pm_state;
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/**
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* hangcheck_period: For hang detection, in ms
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*
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* Note that in practice, a submit/job will get at least two hangcheck
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* periods, due to checking for progress being implemented as simply
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* "have the CP position registers changed since last time?"
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*/
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unsigned int hangcheck_period;
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/** gpu_devfreq_config: Devfreq tuning config for the GPU. */
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struct devfreq_simple_ondemand_data gpu_devfreq_config;
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/**
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* gpu_clamp_to_idle: Enable clamping to idle freq when inactive
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*/
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bool gpu_clamp_to_idle;
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/**
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* disable_err_irq:
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*
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* Disable handling of GPU hw error interrupts, to force fallback to
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* sw hangcheck timer. Written (via debugfs) by igt tests to test
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* the sw hangcheck mechanism.
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*/
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bool disable_err_irq;
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};
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struct msm_format {
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uint32_t pixel_format;
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};
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struct msm_pending_timer;
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int msm_atomic_init_pending_timer(struct msm_pending_timer *timer,
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struct msm_kms *kms, int crtc_idx);
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void msm_atomic_destroy_pending_timer(struct msm_pending_timer *timer);
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void msm_atomic_commit_tail(struct drm_atomic_state *state);
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struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
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void msm_atomic_state_clear(struct drm_atomic_state *state);
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void msm_atomic_state_free(struct drm_atomic_state *state);
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int msm_crtc_enable_vblank(struct drm_crtc *crtc);
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void msm_crtc_disable_vblank(struct drm_crtc *crtc);
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int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu);
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void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu);
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struct msm_gem_address_space *msm_kms_init_aspace(struct drm_device *dev);
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bool msm_use_mmu(struct drm_device *dev);
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int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
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struct drm_file *file);
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#ifdef CONFIG_DEBUG_FS
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unsigned long msm_gem_shrinker_shrink(struct drm_device *dev, unsigned long nr_to_scan);
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#endif
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void msm_gem_shrinker_init(struct drm_device *dev);
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void msm_gem_shrinker_cleanup(struct drm_device *dev);
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int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
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struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
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int msm_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map);
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void msm_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map);
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struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
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struct dma_buf_attachment *attach, struct sg_table *sg);
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int msm_gem_prime_pin(struct drm_gem_object *obj);
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void msm_gem_prime_unpin(struct drm_gem_object *obj);
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int msm_framebuffer_prepare(struct drm_framebuffer *fb,
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struct msm_gem_address_space *aspace, bool needs_dirtyfb);
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void msm_framebuffer_cleanup(struct drm_framebuffer *fb,
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struct msm_gem_address_space *aspace, bool needed_dirtyfb);
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uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb,
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struct msm_gem_address_space *aspace, int plane);
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struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
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const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
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struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
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struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
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struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev,
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int w, int h, int p, uint32_t format);
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struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
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void msm_fbdev_free(struct drm_device *dev);
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struct hdmi;
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#ifdef CONFIG_DRM_MSM_HDMI
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int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
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struct drm_encoder *encoder);
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void __init msm_hdmi_register(void);
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void __exit msm_hdmi_unregister(void);
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#else
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static inline int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
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struct drm_encoder *encoder)
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{
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return -EINVAL;
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}
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static inline void __init msm_hdmi_register(void) {}
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static inline void __exit msm_hdmi_unregister(void) {}
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#endif
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struct msm_dsi;
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#ifdef CONFIG_DRM_MSM_DSI
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int dsi_dev_attach(struct platform_device *pdev);
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void dsi_dev_detach(struct platform_device *pdev);
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void __init msm_dsi_register(void);
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void __exit msm_dsi_unregister(void);
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int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
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struct drm_encoder *encoder);
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void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi);
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bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi);
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bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi);
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bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi);
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struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi);
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#else
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static inline void __init msm_dsi_register(void)
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{
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}
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static inline void __exit msm_dsi_unregister(void)
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{
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}
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static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
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struct drm_device *dev,
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struct drm_encoder *encoder)
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{
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return -EINVAL;
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}
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static inline void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
static inline bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi)
|
||
|
|
{
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
static inline bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi)
|
||
|
|
{
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
static inline bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi)
|
||
|
|
{
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi)
|
||
|
|
{
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef CONFIG_DRM_MSM_DP
|
||
|
|
int __init msm_dp_register(void);
|
||
|
|
void __exit msm_dp_unregister(void);
|
||
|
|
int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
|
||
|
|
struct drm_encoder *encoder);
|
||
|
|
void msm_dp_irq_postinstall(struct msm_dp *dp_display);
|
||
|
|
void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display);
|
||
|
|
|
||
|
|
void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor);
|
||
|
|
bool msm_dp_wide_bus_available(const struct msm_dp *dp_display);
|
||
|
|
|
||
|
|
#else
|
||
|
|
static inline int __init msm_dp_register(void)
|
||
|
|
{
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
static inline void __exit msm_dp_unregister(void)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
static inline int msm_dp_modeset_init(struct msm_dp *dp_display,
|
||
|
|
struct drm_device *dev,
|
||
|
|
struct drm_encoder *encoder)
|
||
|
|
{
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void msm_dp_irq_postinstall(struct msm_dp *dp_display)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
|
||
|
|
struct drm_minor *minor)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline bool msm_dp_wide_bus_available(const struct msm_dp *dp_display)
|
||
|
|
{
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef CONFIG_DRM_MSM_MDP4
|
||
|
|
void msm_mdp4_register(void);
|
||
|
|
void msm_mdp4_unregister(void);
|
||
|
|
#else
|
||
|
|
static inline void msm_mdp4_register(void) {}
|
||
|
|
static inline void msm_mdp4_unregister(void) {}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef CONFIG_DRM_MSM_MDP5
|
||
|
|
void msm_mdp_register(void);
|
||
|
|
void msm_mdp_unregister(void);
|
||
|
|
#else
|
||
|
|
static inline void msm_mdp_register(void) {}
|
||
|
|
static inline void msm_mdp_unregister(void) {}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef CONFIG_DRM_MSM_DPU
|
||
|
|
void msm_dpu_register(void);
|
||
|
|
void msm_dpu_unregister(void);
|
||
|
|
#else
|
||
|
|
static inline void msm_dpu_register(void) {}
|
||
|
|
static inline void msm_dpu_unregister(void) {}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef CONFIG_DRM_MSM_MDSS
|
||
|
|
void msm_mdss_register(void);
|
||
|
|
void msm_mdss_unregister(void);
|
||
|
|
#else
|
||
|
|
static inline void msm_mdss_register(void) {}
|
||
|
|
static inline void msm_mdss_unregister(void) {}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef CONFIG_DEBUG_FS
|
||
|
|
void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
|
||
|
|
int msm_debugfs_late_init(struct drm_device *dev);
|
||
|
|
int msm_rd_debugfs_init(struct drm_minor *minor);
|
||
|
|
void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
|
||
|
|
__printf(3, 4)
|
||
|
|
void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
|
||
|
|
const char *fmt, ...);
|
||
|
|
int msm_perf_debugfs_init(struct drm_minor *minor);
|
||
|
|
void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
|
||
|
|
#else
|
||
|
|
static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
|
||
|
|
__printf(3, 4)
|
||
|
|
static inline void msm_rd_dump_submit(struct msm_rd_state *rd,
|
||
|
|
struct msm_gem_submit *submit,
|
||
|
|
const char *fmt, ...) {}
|
||
|
|
static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
|
||
|
|
static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
|
||
|
|
|
||
|
|
struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,
|
||
|
|
const char *name);
|
||
|
|
void __iomem *msm_ioremap(struct platform_device *pdev, const char *name);
|
||
|
|
void __iomem *msm_ioremap_size(struct platform_device *pdev, const char *name,
|
||
|
|
phys_addr_t *size);
|
||
|
|
void __iomem *msm_ioremap_quiet(struct platform_device *pdev, const char *name);
|
||
|
|
|
||
|
|
struct icc_path *msm_icc_get(struct device *dev, const char *name);
|
||
|
|
|
||
|
|
#define msm_writel(data, addr) writel((data), (addr))
|
||
|
|
#define msm_readl(addr) readl((addr))
|
||
|
|
|
||
|
|
static inline void msm_rmw(void __iomem *addr, u32 mask, u32 or)
|
||
|
|
{
|
||
|
|
u32 val = msm_readl(addr);
|
||
|
|
|
||
|
|
val &= ~mask;
|
||
|
|
msm_writel(val | or, addr);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* struct msm_hrtimer_work - a helper to combine an hrtimer with kthread_work
|
||
|
|
*
|
||
|
|
* @timer: hrtimer to control when the kthread work is triggered
|
||
|
|
* @work: the kthread work
|
||
|
|
* @worker: the kthread worker the work will be scheduled on
|
||
|
|
*/
|
||
|
|
struct msm_hrtimer_work {
|
||
|
|
struct hrtimer timer;
|
||
|
|
struct kthread_work work;
|
||
|
|
struct kthread_worker *worker;
|
||
|
|
};
|
||
|
|
|
||
|
|
void msm_hrtimer_queue_work(struct msm_hrtimer_work *work,
|
||
|
|
ktime_t wakeup_time,
|
||
|
|
enum hrtimer_mode mode);
|
||
|
|
void msm_hrtimer_work_init(struct msm_hrtimer_work *work,
|
||
|
|
struct kthread_worker *worker,
|
||
|
|
kthread_work_func_t fn,
|
||
|
|
clockid_t clock_id,
|
||
|
|
enum hrtimer_mode mode);
|
||
|
|
|
||
|
|
#define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
|
||
|
|
#define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
|
||
|
|
|
||
|
|
static inline int align_pitch(int width, int bpp)
|
||
|
|
{
|
||
|
|
int bytespp = (bpp + 7) / 8;
|
||
|
|
/* adreno needs pitch aligned to 32 pixels: */
|
||
|
|
return bytespp * ALIGN(width, 32);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* for the generated headers: */
|
||
|
|
#define INVALID_IDX(idx) ({BUG(); 0;})
|
||
|
|
#define fui(x) ({BUG(); 0;})
|
||
|
|
#define _mesa_float_to_half(x) ({BUG(); 0;})
|
||
|
|
|
||
|
|
|
||
|
|
#define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
|
||
|
|
|
||
|
|
/* for conditionally setting boolean flag(s): */
|
||
|
|
#define COND(bool, val) ((bool) ? (val) : 0)
|
||
|
|
|
||
|
|
static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
|
||
|
|
{
|
||
|
|
ktime_t now = ktime_get();
|
||
|
|
s64 remaining_jiffies;
|
||
|
|
|
||
|
|
if (ktime_compare(*timeout, now) < 0) {
|
||
|
|
remaining_jiffies = 0;
|
||
|
|
} else {
|
||
|
|
ktime_t rem = ktime_sub(*timeout, now);
|
||
|
|
remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ);
|
||
|
|
}
|
||
|
|
|
||
|
|
return clamp(remaining_jiffies, 0LL, (s64)INT_MAX);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Driver helpers */
|
||
|
|
|
||
|
|
extern const struct component_master_ops msm_drm_ops;
|
||
|
|
|
||
|
|
int msm_pm_prepare(struct device *dev);
|
||
|
|
void msm_pm_complete(struct device *dev);
|
||
|
|
|
||
|
|
int msm_drv_probe(struct device *dev,
|
||
|
|
int (*kms_init)(struct drm_device *dev));
|
||
|
|
void msm_drv_shutdown(struct platform_device *pdev);
|
||
|
|
|
||
|
|
|
||
|
|
#endif /* __MSM_DRV_H__ */
|