490 lines
15 KiB
C
490 lines
15 KiB
C
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/*
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* Copyright (C) 2015 Red Hat, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef VIRTIO_DRV_H
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#define VIRTIO_DRV_H
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#include <linux/dma-direction.h>
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#include <linux/virtio.h>
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#include <linux/virtio_ids.h>
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#include <linux/virtio_config.h>
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#include <linux/virtio_gpu.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_encoder.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_framebuffer.h>
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#include <drm/drm_gem.h>
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#include <drm/drm_gem_shmem_helper.h>
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#include <drm/drm_ioctl.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/virtgpu_drm.h>
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#define DRIVER_NAME "virtio_gpu"
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#define DRIVER_DESC "virtio GPU"
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#define DRIVER_DATE "0"
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 1
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#define DRIVER_PATCHLEVEL 0
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#define STATE_INITIALIZING 0
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#define STATE_OK 1
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#define STATE_ERR 2
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#define MAX_CAPSET_ID 63
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#define MAX_RINGS 64
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struct virtio_gpu_object_params {
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unsigned long size;
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bool dumb;
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/* 3d */
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bool virgl;
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bool blob;
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/* classic resources only */
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uint32_t format;
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uint32_t width;
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uint32_t height;
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uint32_t target;
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uint32_t bind;
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uint32_t depth;
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uint32_t array_size;
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uint32_t last_level;
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uint32_t nr_samples;
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uint32_t flags;
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/* blob resources only */
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uint32_t ctx_id;
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uint32_t blob_mem;
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uint32_t blob_flags;
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uint64_t blob_id;
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};
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struct virtio_gpu_object {
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struct drm_gem_shmem_object base;
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uint32_t hw_res_handle;
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bool dumb;
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bool created;
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bool host3d_blob, guest_blob;
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uint32_t blob_mem, blob_flags;
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int uuid_state;
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uuid_t uuid;
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};
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#define gem_to_virtio_gpu_obj(gobj) \
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container_of((gobj), struct virtio_gpu_object, base.base)
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struct virtio_gpu_object_shmem {
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struct virtio_gpu_object base;
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};
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struct virtio_gpu_object_vram {
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struct virtio_gpu_object base;
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uint32_t map_state;
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uint32_t map_info;
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struct drm_mm_node vram_node;
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};
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#define to_virtio_gpu_shmem(virtio_gpu_object) \
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container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base)
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#define to_virtio_gpu_vram(virtio_gpu_object) \
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container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base)
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struct virtio_gpu_object_array {
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struct ww_acquire_ctx ticket;
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struct list_head next;
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u32 nents, total;
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struct drm_gem_object *objs[];
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};
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struct virtio_gpu_vbuffer;
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struct virtio_gpu_device;
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typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer *vbuf);
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struct virtio_gpu_fence_driver {
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atomic64_t last_fence_id;
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uint64_t current_fence_id;
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uint64_t context;
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struct list_head fences;
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spinlock_t lock;
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};
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struct virtio_gpu_fence_event {
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struct drm_pending_event base;
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struct drm_event event;
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};
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struct virtio_gpu_fence {
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struct dma_fence f;
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uint32_t ring_idx;
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uint64_t fence_id;
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bool emit_fence_info;
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struct virtio_gpu_fence_event *e;
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struct virtio_gpu_fence_driver *drv;
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struct list_head node;
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};
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struct virtio_gpu_vbuffer {
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char *buf;
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int size;
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void *data_buf;
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uint32_t data_size;
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char *resp_buf;
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int resp_size;
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virtio_gpu_resp_cb resp_cb;
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void *resp_cb_data;
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struct virtio_gpu_object_array *objs;
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struct list_head list;
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uint32_t seqno;
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};
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struct virtio_gpu_output {
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int index;
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struct drm_crtc crtc;
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struct drm_connector conn;
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struct drm_encoder enc;
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struct virtio_gpu_display_one info;
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struct virtio_gpu_update_cursor cursor;
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struct edid *edid;
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int cur_x;
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int cur_y;
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bool needs_modeset;
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};
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#define drm_crtc_to_virtio_gpu_output(x) \
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container_of(x, struct virtio_gpu_output, crtc)
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struct virtio_gpu_framebuffer {
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struct drm_framebuffer base;
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struct virtio_gpu_fence *fence;
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};
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#define to_virtio_gpu_framebuffer(x) \
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container_of(x, struct virtio_gpu_framebuffer, base)
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struct virtio_gpu_queue {
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struct virtqueue *vq;
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spinlock_t qlock;
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wait_queue_head_t ack_queue;
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struct work_struct dequeue_work;
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uint32_t seqno;
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};
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struct virtio_gpu_drv_capset {
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uint32_t id;
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uint32_t max_version;
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uint32_t max_size;
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};
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struct virtio_gpu_drv_cap_cache {
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struct list_head head;
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void *caps_cache;
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uint32_t id;
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uint32_t version;
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uint32_t size;
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atomic_t is_valid;
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};
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struct virtio_gpu_device {
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struct drm_device *ddev;
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struct virtio_device *vdev;
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struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
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uint32_t num_scanouts;
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struct virtio_gpu_queue ctrlq;
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struct virtio_gpu_queue cursorq;
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struct kmem_cache *vbufs;
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atomic_t pending_commands;
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struct ida resource_ida;
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wait_queue_head_t resp_wq;
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/* current display info */
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spinlock_t display_info_lock;
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bool display_info_pending;
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struct virtio_gpu_fence_driver fence_drv;
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struct ida ctx_id_ida;
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bool has_virgl_3d;
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bool has_edid;
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bool has_indirect;
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bool has_resource_assign_uuid;
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bool has_resource_blob;
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bool has_host_visible;
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bool has_context_init;
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struct virtio_shm_region host_visible_region;
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struct drm_mm host_visible_mm;
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struct work_struct config_changed_work;
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struct work_struct obj_free_work;
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spinlock_t obj_free_lock;
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struct list_head obj_free_list;
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struct virtio_gpu_drv_capset *capsets;
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uint32_t num_capsets;
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uint64_t capset_id_mask;
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struct list_head cap_cache;
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/* protects uuid state when exporting */
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spinlock_t resource_export_lock;
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/* protects map state and host_visible_mm */
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spinlock_t host_visible_lock;
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};
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struct virtio_gpu_fpriv {
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uint32_t ctx_id;
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uint32_t context_init;
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bool context_created;
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uint32_t num_rings;
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uint64_t base_fence_ctx;
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uint64_t ring_idx_mask;
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struct mutex context_lock;
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};
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/* virtgpu_ioctl.c */
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#define DRM_VIRTIO_NUM_IOCTLS 12
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extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
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void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file);
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/* virtgpu_kms.c */
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int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev);
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void virtio_gpu_deinit(struct drm_device *dev);
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void virtio_gpu_release(struct drm_device *dev);
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int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
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void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
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/* virtgpu_gem.c */
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int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
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struct drm_file *file);
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void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
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struct drm_file *file);
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int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
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struct drm_device *dev,
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struct drm_mode_create_dumb *args);
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int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
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struct drm_device *dev,
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uint32_t handle, uint64_t *offset_p);
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struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
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struct virtio_gpu_object_array*
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virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
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void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
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struct drm_gem_object *obj);
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int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
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void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
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void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
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struct dma_fence *fence);
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void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
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void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_object_array *objs);
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void virtio_gpu_array_put_free_work(struct work_struct *work);
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/* virtgpu_vq.c */
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int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
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void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
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void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_object *bo,
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struct virtio_gpu_object_params *params,
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struct virtio_gpu_object_array *objs,
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struct virtio_gpu_fence *fence);
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void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_object *bo);
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void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
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uint64_t offset,
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uint32_t width, uint32_t height,
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uint32_t x, uint32_t y,
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struct virtio_gpu_object_array *objs,
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struct virtio_gpu_fence *fence);
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void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
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uint32_t resource_id,
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uint32_t x, uint32_t y,
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uint32_t width, uint32_t height,
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struct virtio_gpu_object_array *objs,
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struct virtio_gpu_fence *fence);
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void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
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uint32_t scanout_id, uint32_t resource_id,
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uint32_t width, uint32_t height,
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uint32_t x, uint32_t y);
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void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_object *obj,
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struct virtio_gpu_mem_entry *ents,
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unsigned int nents);
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int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
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int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
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void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_output *output);
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int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
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int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
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int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
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int idx, int version,
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struct virtio_gpu_drv_cap_cache **cache_p);
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int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
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void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
|
||
|
|
uint32_t context_init, uint32_t nlen,
|
||
|
|
const char *name);
|
||
|
|
void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
|
||
|
|
uint32_t id);
|
||
|
|
void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
|
||
|
|
uint32_t ctx_id,
|
||
|
|
struct virtio_gpu_object_array *objs);
|
||
|
|
void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
|
||
|
|
uint32_t ctx_id,
|
||
|
|
struct virtio_gpu_object_array *objs);
|
||
|
|
void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
|
||
|
|
void *data, uint32_t data_size,
|
||
|
|
uint32_t ctx_id,
|
||
|
|
struct virtio_gpu_object_array *objs,
|
||
|
|
struct virtio_gpu_fence *fence);
|
||
|
|
void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
|
||
|
|
uint32_t ctx_id,
|
||
|
|
uint64_t offset, uint32_t level,
|
||
|
|
uint32_t stride,
|
||
|
|
uint32_t layer_stride,
|
||
|
|
struct drm_virtgpu_3d_box *box,
|
||
|
|
struct virtio_gpu_object_array *objs,
|
||
|
|
struct virtio_gpu_fence *fence);
|
||
|
|
void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
|
||
|
|
uint32_t ctx_id,
|
||
|
|
uint64_t offset, uint32_t level,
|
||
|
|
uint32_t stride,
|
||
|
|
uint32_t layer_stride,
|
||
|
|
struct drm_virtgpu_3d_box *box,
|
||
|
|
struct virtio_gpu_object_array *objs,
|
||
|
|
struct virtio_gpu_fence *fence);
|
||
|
|
void
|
||
|
|
virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
|
||
|
|
struct virtio_gpu_object *bo,
|
||
|
|
struct virtio_gpu_object_params *params,
|
||
|
|
struct virtio_gpu_object_array *objs,
|
||
|
|
struct virtio_gpu_fence *fence);
|
||
|
|
void virtio_gpu_ctrl_ack(struct virtqueue *vq);
|
||
|
|
void virtio_gpu_cursor_ack(struct virtqueue *vq);
|
||
|
|
void virtio_gpu_fence_ack(struct virtqueue *vq);
|
||
|
|
void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
|
||
|
|
void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
|
||
|
|
void virtio_gpu_dequeue_fence_func(struct work_struct *work);
|
||
|
|
|
||
|
|
void virtio_gpu_notify(struct virtio_gpu_device *vgdev);
|
||
|
|
|
||
|
|
int
|
||
|
|
virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev,
|
||
|
|
struct virtio_gpu_object_array *objs);
|
||
|
|
|
||
|
|
int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev,
|
||
|
|
struct virtio_gpu_object_array *objs, uint64_t offset);
|
||
|
|
|
||
|
|
void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev,
|
||
|
|
struct virtio_gpu_object *bo);
|
||
|
|
|
||
|
|
void
|
||
|
|
virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev,
|
||
|
|
struct virtio_gpu_object *bo,
|
||
|
|
struct virtio_gpu_object_params *params,
|
||
|
|
struct virtio_gpu_mem_entry *ents,
|
||
|
|
uint32_t nents);
|
||
|
|
void
|
||
|
|
virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev,
|
||
|
|
uint32_t scanout_id,
|
||
|
|
struct virtio_gpu_object *bo,
|
||
|
|
struct drm_framebuffer *fb,
|
||
|
|
uint32_t width, uint32_t height,
|
||
|
|
uint32_t x, uint32_t y);
|
||
|
|
|
||
|
|
/* virtgpu_display.c */
|
||
|
|
int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
|
||
|
|
void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
|
||
|
|
|
||
|
|
/* virtgpu_plane.c */
|
||
|
|
uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
|
||
|
|
struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
|
||
|
|
enum drm_plane_type type,
|
||
|
|
int index);
|
||
|
|
|
||
|
|
/* virtgpu_fence.c */
|
||
|
|
struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,
|
||
|
|
uint64_t base_fence_ctx,
|
||
|
|
uint32_t ring_idx);
|
||
|
|
void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
|
||
|
|
struct virtio_gpu_ctrl_hdr *cmd_hdr,
|
||
|
|
struct virtio_gpu_fence *fence);
|
||
|
|
void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
|
||
|
|
u64 fence_id);
|
||
|
|
|
||
|
|
/* virtgpu_object.c */
|
||
|
|
void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo);
|
||
|
|
struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
|
||
|
|
size_t size);
|
||
|
|
int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
|
||
|
|
struct virtio_gpu_object_params *params,
|
||
|
|
struct virtio_gpu_object **bo_ptr,
|
||
|
|
struct virtio_gpu_fence *fence);
|
||
|
|
|
||
|
|
bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo);
|
||
|
|
|
||
|
|
int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
|
||
|
|
uint32_t *resid);
|
||
|
|
/* virtgpu_prime.c */
|
||
|
|
int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev,
|
||
|
|
struct virtio_gpu_object *bo);
|
||
|
|
struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj,
|
||
|
|
int flags);
|
||
|
|
struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev,
|
||
|
|
struct dma_buf *buf);
|
||
|
|
int virtgpu_gem_prime_get_uuid(struct drm_gem_object *obj,
|
||
|
|
uuid_t *uuid);
|
||
|
|
struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
|
||
|
|
struct drm_device *dev, struct dma_buf_attachment *attach,
|
||
|
|
struct sg_table *sgt);
|
||
|
|
|
||
|
|
/* virtgpu_debugfs.c */
|
||
|
|
void virtio_gpu_debugfs_init(struct drm_minor *minor);
|
||
|
|
|
||
|
|
/* virtgpu_vram.c */
|
||
|
|
bool virtio_gpu_is_vram(struct virtio_gpu_object *bo);
|
||
|
|
int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev,
|
||
|
|
struct virtio_gpu_object_params *params,
|
||
|
|
struct virtio_gpu_object **bo_ptr);
|
||
|
|
struct sg_table *virtio_gpu_vram_map_dma_buf(struct virtio_gpu_object *bo,
|
||
|
|
struct device *dev,
|
||
|
|
enum dma_data_direction dir);
|
||
|
|
void virtio_gpu_vram_unmap_dma_buf(struct device *dev,
|
||
|
|
struct sg_table *sgt,
|
||
|
|
enum dma_data_direction dir);
|
||
|
|
|
||
|
|
#endif
|