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linux-zen-desktop/drivers/media/i2c/ov5640.c

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Initial commit
2023-08-30 17:31:07 +02:00
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2014-2017 Mentor Graphics Inc.
*/
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/ctype.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <media/v4l2-async.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-event.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-subdev.h>
/* min/typical/max system clock (xclk) frequencies */
#define OV5640_XCLK_MIN 6000000
#define OV5640_XCLK_MAX 54000000
#define OV5640_NATIVE_WIDTH 2624
#define OV5640_NATIVE_HEIGHT 1964
#define OV5640_PIXEL_ARRAY_TOP 14
#define OV5640_PIXEL_ARRAY_LEFT 16
#define OV5640_PIXEL_ARRAY_WIDTH 2592
#define OV5640_PIXEL_ARRAY_HEIGHT 1944
/* FIXME: not documented. */
#define OV5640_MIN_VBLANK 24
#define OV5640_MAX_VTS 3375
#define OV5640_DEFAULT_SLAVE_ID 0x3c
#define OV5640_LINK_RATE_MAX 490000000U
#define OV5640_REG_SYS_RESET02 0x3002
#define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
#define OV5640_REG_SYS_CTRL0 0x3008
#define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42
#define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02
#define OV5640_REG_SYS_CTRL0_SW_RST 0x82
#define OV5640_REG_CHIP_ID 0x300a
#define OV5640_REG_IO_MIPI_CTRL00 0x300e
#define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
#define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
#define OV5640_REG_PAD_OUTPUT00 0x3019
#define OV5640_REG_SYSTEM_CONTROL1 0x302e
#define OV5640_REG_SC_PLL_CTRL0 0x3034
#define OV5640_REG_SC_PLL_CTRL1 0x3035
#define OV5640_REG_SC_PLL_CTRL2 0x3036
#define OV5640_REG_SC_PLL_CTRL3 0x3037
#define OV5640_REG_SLAVE_ID 0x3100
#define OV5640_REG_SCCB_SYS_CTRL1 0x3103
#define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
#define OV5640_REG_AWB_R_GAIN 0x3400
#define OV5640_REG_AWB_G_GAIN 0x3402
#define OV5640_REG_AWB_B_GAIN 0x3404
#define OV5640_REG_AWB_MANUAL_CTRL 0x3406
#define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500
#define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501
#define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502
#define OV5640_REG_AEC_PK_MANUAL 0x3503
#define OV5640_REG_AEC_PK_REAL_GAIN 0x350a
#define OV5640_REG_AEC_PK_VTS 0x350c
#define OV5640_REG_TIMING_HS 0x3800
#define OV5640_REG_TIMING_VS 0x3802
#define OV5640_REG_TIMING_HW 0x3804
#define OV5640_REG_TIMING_VH 0x3806
#define OV5640_REG_TIMING_DVPHO 0x3808
#define OV5640_REG_TIMING_DVPVO 0x380a
#define OV5640_REG_TIMING_HTS 0x380c
#define OV5640_REG_TIMING_VTS 0x380e
#define OV5640_REG_TIMING_HOFFS 0x3810
#define OV5640_REG_TIMING_VOFFS 0x3812
#define OV5640_REG_TIMING_TC_REG20 0x3820
#define OV5640_REG_TIMING_TC_REG21 0x3821
#define OV5640_REG_AEC_CTRL00 0x3a00
#define OV5640_REG_AEC_B50_STEP 0x3a08
#define OV5640_REG_AEC_B60_STEP 0x3a0a
#define OV5640_REG_AEC_CTRL0D 0x3a0d
#define OV5640_REG_AEC_CTRL0E 0x3a0e
#define OV5640_REG_AEC_CTRL0F 0x3a0f
#define OV5640_REG_AEC_CTRL10 0x3a10
#define OV5640_REG_AEC_CTRL11 0x3a11
#define OV5640_REG_AEC_CTRL1B 0x3a1b
#define OV5640_REG_AEC_CTRL1E 0x3a1e
#define OV5640_REG_AEC_CTRL1F 0x3a1f
#define OV5640_REG_HZ5060_CTRL00 0x3c00
#define OV5640_REG_HZ5060_CTRL01 0x3c01
#define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
#define OV5640_REG_FRAME_CTRL01 0x4202
#define OV5640_REG_FORMAT_CONTROL00 0x4300
#define OV5640_REG_VFIFO_HSIZE 0x4602
#define OV5640_REG_VFIFO_VSIZE 0x4604
#define OV5640_REG_JPG_MODE_SELECT 0x4713
#define OV5640_REG_CCIR656_CTRL00 0x4730
#define OV5640_REG_POLARITY_CTRL00 0x4740
#define OV5640_REG_MIPI_CTRL00 0x4800
#define OV5640_REG_DEBUG_MODE 0x4814
#define OV5640_REG_PCLK_PERIOD 0x4837
#define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
#define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
#define OV5640_REG_SDE_CTRL0 0x5580
#define OV5640_REG_SDE_CTRL1 0x5581
#define OV5640_REG_SDE_CTRL3 0x5583
#define OV5640_REG_SDE_CTRL4 0x5584
#define OV5640_REG_SDE_CTRL5 0x5585
#define OV5640_REG_AVG_READOUT 0x56a1
enum ov5640_mode_id {
OV5640_MODE_QQVGA_160_120 = 0,
OV5640_MODE_QCIF_176_144,
OV5640_MODE_QVGA_320_240,
OV5640_MODE_VGA_640_480,
OV5640_MODE_NTSC_720_480,
OV5640_MODE_PAL_720_576,
OV5640_MODE_XGA_1024_768,
OV5640_MODE_720P_1280_720,
OV5640_MODE_1080P_1920_1080,
OV5640_MODE_QSXGA_2592_1944,
OV5640_NUM_MODES,
};
enum ov5640_frame_rate {
OV5640_15_FPS = 0,
OV5640_30_FPS,
OV5640_60_FPS,
OV5640_NUM_FRAMERATES,
};
enum ov5640_pixel_rate_id {
OV5640_PIXEL_RATE_168M,
OV5640_PIXEL_RATE_148M,
OV5640_PIXEL_RATE_124M,
OV5640_PIXEL_RATE_96M,
OV5640_PIXEL_RATE_48M,
OV5640_NUM_PIXEL_RATES,
};
/*
* The chip manual suggests 24/48/96/192 MHz pixel clocks.
*
* 192MHz exceeds the sysclk limits; use 168MHz as maximum pixel rate for
* full resolution mode @15 FPS.
*/
static const u32 ov5640_pixel_rates[] = {
[OV5640_PIXEL_RATE_168M] = 168000000,
[OV5640_PIXEL_RATE_148M] = 148000000,
[OV5640_PIXEL_RATE_124M] = 124000000,
[OV5640_PIXEL_RATE_96M] = 96000000,
[OV5640_PIXEL_RATE_48M] = 48000000,
};
/*
* MIPI CSI-2 link frequencies.
*
* Derived from the above defined pixel rate for bpp = (8, 16, 24) and
* data_lanes = (1, 2)
*
* link_freq = (pixel_rate * bpp) / (2 * data_lanes)
*/
static const s64 ov5640_csi2_link_freqs[] = {
992000000, 888000000, 768000000, 744000000, 672000000, 672000000,
592000000, 592000000, 576000000, 576000000, 496000000, 496000000,
384000000, 384000000, 384000000, 336000000, 296000000, 288000000,
248000000, 192000000, 192000000, 192000000, 96000000,
};
/* Link freq for default mode: UYVY 16 bpp, 2 data lanes. */
#define OV5640_DEFAULT_LINK_FREQ 13
enum ov5640_format_mux {
OV5640_FMT_MUX_YUV422 = 0,
OV5640_FMT_MUX_RGB,
OV5640_FMT_MUX_DITHER,
OV5640_FMT_MUX_RAW_DPC,
OV5640_FMT_MUX_SNR_RAW,
OV5640_FMT_MUX_RAW_CIP,
};
struct ov5640_pixfmt {
u32 code;
u32 colorspace;
u8 bpp;
u8 ctrl00;
enum ov5640_format_mux mux;
};
static const struct ov5640_pixfmt ov5640_dvp_formats[] = {
{
/* YUV422, YUYV */
.code = MEDIA_BUS_FMT_JPEG_1X8,
.colorspace = V4L2_COLORSPACE_JPEG,
.bpp = 16,
.ctrl00 = 0x30,
.mux = OV5640_FMT_MUX_YUV422,
}, {
/* YUV422, UYVY */
.code = MEDIA_BUS_FMT_UYVY8_2X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 16,
.ctrl00 = 0x3f,
.mux = OV5640_FMT_MUX_YUV422,
}, {
/* YUV422, YUYV */
.code = MEDIA_BUS_FMT_YUYV8_2X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 16,
.ctrl00 = 0x30,
.mux = OV5640_FMT_MUX_YUV422,
}, {
/* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
.code = MEDIA_BUS_FMT_RGB565_2X8_LE,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 16,
.ctrl00 = 0x6f,
.mux = OV5640_FMT_MUX_RGB,
}, {
/* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
.code = MEDIA_BUS_FMT_RGB565_2X8_BE,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 16,
.ctrl00 = 0x61,
.mux = OV5640_FMT_MUX_RGB,
}, {
/* Raw, BGBG... / GRGR... */
.code = MEDIA_BUS_FMT_SBGGR8_1X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 8,
.ctrl00 = 0x00,
.mux = OV5640_FMT_MUX_RAW_DPC,
}, {
/* Raw bayer, GBGB... / RGRG... */
.code = MEDIA_BUS_FMT_SGBRG8_1X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 8,
.ctrl00 = 0x01,
.mux = OV5640_FMT_MUX_RAW_DPC,
}, {
/* Raw bayer, GRGR... / BGBG... */
.code = MEDIA_BUS_FMT_SGRBG8_1X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 8,
.ctrl00 = 0x02,
.mux = OV5640_FMT_MUX_RAW_DPC,
}, {
/* Raw bayer, RGRG... / GBGB... */
.code = MEDIA_BUS_FMT_SRGGB8_1X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 8,
.ctrl00 = 0x03,
.mux = OV5640_FMT_MUX_RAW_DPC,
},
{ /* sentinel */ }
};
static const struct ov5640_pixfmt ov5640_csi2_formats[] = {
{
/* YUV422, YUYV */
.code = MEDIA_BUS_FMT_JPEG_1X8,
.colorspace = V4L2_COLORSPACE_JPEG,
.bpp = 16,
.ctrl00 = 0x30,
.mux = OV5640_FMT_MUX_YUV422,
}, {
/* YUV422, UYVY */
.code = MEDIA_BUS_FMT_UYVY8_1X16,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 16,
.ctrl00 = 0x3f,
.mux = OV5640_FMT_MUX_YUV422,
}, {
/* YUV422, YUYV */
.code = MEDIA_BUS_FMT_YUYV8_1X16,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 16,
.ctrl00 = 0x30,
.mux = OV5640_FMT_MUX_YUV422,
}, {
/* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
.code = MEDIA_BUS_FMT_RGB565_1X16,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 16,
.ctrl00 = 0x6f,
.mux = OV5640_FMT_MUX_RGB,
}, {
/* BGR888: RGB */
.code = MEDIA_BUS_FMT_BGR888_1X24,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 24,
.ctrl00 = 0x23,
.mux = OV5640_FMT_MUX_RGB,
}, {
/* Raw, BGBG... / GRGR... */
.code = MEDIA_BUS_FMT_SBGGR8_1X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 8,
.ctrl00 = 0x00,
.mux = OV5640_FMT_MUX_RAW_DPC,
}, {
/* Raw bayer, GBGB... / RGRG... */
.code = MEDIA_BUS_FMT_SGBRG8_1X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 8,
.ctrl00 = 0x01,
.mux = OV5640_FMT_MUX_RAW_DPC,
}, {
/* Raw bayer, GRGR... / BGBG... */
.code = MEDIA_BUS_FMT_SGRBG8_1X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 8,
.ctrl00 = 0x02,
.mux = OV5640_FMT_MUX_RAW_DPC,
}, {
/* Raw bayer, RGRG... / GBGB... */
.code = MEDIA_BUS_FMT_SRGGB8_1X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.bpp = 8,
.ctrl00 = 0x03,
.mux = OV5640_FMT_MUX_RAW_DPC,
},
{ /* sentinel */ }
};
/*
* FIXME: remove this when a subdev API becomes available
* to set the MIPI CSI-2 virtual channel.
*/
static unsigned int virtual_channel;
module_param(virtual_channel, uint, 0444);
MODULE_PARM_DESC(virtual_channel,
"MIPI CSI-2 virtual channel (0..3), default 0");
static const int ov5640_framerates[] = {
[OV5640_15_FPS] = 15,
[OV5640_30_FPS] = 30,
[OV5640_60_FPS] = 60,
};
/* regulator supplies */
static const char * const ov5640_supply_name[] = {
"DOVDD", /* Digital I/O (1.8V) supply */
"AVDD", /* Analog (2.8V) supply */
"DVDD", /* Digital Core (1.5V) supply */
};
#define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
/*
* Image size under 1280 * 960 are SUBSAMPLING
* Image size upper 1280 * 960 are SCALING
*/
enum ov5640_downsize_mode {
SUBSAMPLING,
SCALING,
};
struct reg_value {
u16 reg_addr;
u8 val;
u8 mask;
u32 delay_ms;
};
struct ov5640_timings {
/* Analog crop rectangle. */
struct v4l2_rect analog_crop;
/* Visibile crop: from analog crop top-left corner. */
struct v4l2_rect crop;
/* Total pixels per line: width + fixed hblank. */
u32 htot;
/* Default vertical blanking: frame height = height + vblank. */
u32 vblank_def;
};
struct ov5640_mode_info {
enum ov5640_mode_id id;
enum ov5640_downsize_mode dn_mode;
enum ov5640_pixel_rate_id pixel_rate;
unsigned int width;
unsigned int height;
struct ov5640_timings dvp_timings;
struct ov5640_timings csi2_timings;
const struct reg_value *reg_data;
u32 reg_data_size;
/* Used by s_frame_interval only. */
u32 max_fps;
u32 def_fps;
};
struct ov5640_ctrls {
struct v4l2_ctrl_handler handler;
struct v4l2_ctrl *pixel_rate;
struct v4l2_ctrl *link_freq;
struct v4l2_ctrl *hblank;
struct v4l2_ctrl *vblank;
struct {
struct v4l2_ctrl *auto_exp;
struct v4l2_ctrl *exposure;
};
struct {
struct v4l2_ctrl *auto_wb;
struct v4l2_ctrl *blue_balance;
struct v4l2_ctrl *red_balance;
};
struct {
struct v4l2_ctrl *auto_gain;
struct v4l2_ctrl *gain;
};
struct v4l2_ctrl *brightness;
struct v4l2_ctrl *light_freq;
struct v4l2_ctrl *saturation;
struct v4l2_ctrl *contrast;
struct v4l2_ctrl *hue;
struct v4l2_ctrl *test_pattern;
struct v4l2_ctrl *hflip;
struct v4l2_ctrl *vflip;
};
struct ov5640_dev {
struct i2c_client *i2c_client;
struct v4l2_subdev sd;
struct media_pad pad;
struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
struct clk *xclk; /* system clock to OV5640 */
u32 xclk_freq;
struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
struct gpio_desc *reset_gpio;
struct gpio_desc *pwdn_gpio;
bool upside_down;
/* lock to protect all members below */
struct mutex lock;
struct v4l2_mbus_framefmt fmt;
bool pending_fmt_change;
const struct ov5640_mode_info *current_mode;
const struct ov5640_mode_info *last_mode;
enum ov5640_frame_rate current_fr;
struct v4l2_fract frame_interval;
s64 current_link_freq;
struct ov5640_ctrls ctrls;
u32 prev_sysclk, prev_hts;
u32 ae_low, ae_high, ae_target;
bool pending_mode_change;
bool streaming;
};
static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
{
return container_of(sd, struct ov5640_dev, sd);
}
static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
{
return &container_of(ctrl->handler, struct ov5640_dev,
ctrls.handler)->sd;
}
static inline bool ov5640_is_csi2(const struct ov5640_dev *sensor)
{
return sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY;
}
static inline const struct ov5640_pixfmt *
ov5640_formats(struct ov5640_dev *sensor)
{
return ov5640_is_csi2(sensor) ? ov5640_csi2_formats
: ov5640_dvp_formats;
}
static const struct ov5640_pixfmt *
ov5640_code_to_pixfmt(struct ov5640_dev *sensor, u32 code)
{
const struct ov5640_pixfmt *formats = ov5640_formats(sensor);
unsigned int i;
for (i = 0; formats[i].code; ++i) {
if (formats[i].code == code)
return &formats[i];
}
return &formats[0];
}
static u32 ov5640_code_to_bpp(struct ov5640_dev *sensor, u32 code)
{
const struct ov5640_pixfmt *format = ov5640_code_to_pixfmt(sensor,
code);
return format->bpp;
}
/*
* FIXME: all of these register tables are likely filled with
* entries that set the register to their power-on default values,
* and which are otherwise not touched by this driver. Those entries
* should be identified and removed to speed register load time
* over i2c.
*/
/* YUV422 UYVY VGA@30fps */
static const struct v4l2_mbus_framefmt ov5640_csi2_default_fmt = {
.code = MEDIA_BUS_FMT_UYVY8_1X16,
.width = 640,
.height = 480,
.colorspace = V4L2_COLORSPACE_SRGB,
.ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SRGB),
.quantization = V4L2_QUANTIZATION_FULL_RANGE,
.xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SRGB),
.field = V4L2_FIELD_NONE,
};
static const struct v4l2_mbus_framefmt ov5640_dvp_default_fmt = {
.code = MEDIA_BUS_FMT_UYVY8_2X8,
.width = 640,
.height = 480,
.colorspace = V4L2_COLORSPACE_SRGB,
.ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SRGB),
.quantization = V4L2_QUANTIZATION_FULL_RANGE,
.xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SRGB),
.field = V4L2_FIELD_NONE,
};
static const struct reg_value ov5640_init_setting[] = {
{0x3103, 0x11, 0, 0},
{0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0},
{0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
{0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
{0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
{0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
{0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
{0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
{0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
{0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
{0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
{0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
{0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
{0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
{0x3815, 0x31, 0, 0},
{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
{0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
{0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
{0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
{0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
{0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
{0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
{0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
{0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
{0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
{0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
{0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
{0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
{0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
{0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
{0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
{0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
{0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
{0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
{0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
{0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
{0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
{0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
{0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
{0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
{0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
{0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
{0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
{0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
{0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
{0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
{0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
{0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
{0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
{0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
{0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
{0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
{0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
{0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
{0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
{0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
{0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
{0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
{0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
{0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
{0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
{0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
{0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
{0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
{0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
{0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
{0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
{0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
{0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
{0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
{0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
};
static const struct reg_value ov5640_setting_low_res[] = {
{0x3c07, 0x08, 0, 0},
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
{0x3814, 0x31, 0, 0},
{0x3815, 0x31, 0, 0},
{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
{0x4407, 0x04, 0, 0}, {0x5001, 0xa3, 0, 0},
};
static const struct reg_value ov5640_setting_720P_1280_720[] = {
{0x3c07, 0x07, 0, 0},
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
{0x3814, 0x31, 0, 0},
{0x3815, 0x31, 0, 0},
{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
{0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
{0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
{0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
{0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
{0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
};
static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
{0x3c07, 0x08, 0, 0},
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
{0x3814, 0x11, 0, 0},
{0x3815, 0x11, 0, 0},
{0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
{0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
{0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
{0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
{0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
{0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
{0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
{0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
{0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
{0x4005, 0x1a, 0, 0},
};
static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
{0x3c07, 0x08, 0, 0},
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
{0x3814, 0x11, 0, 0},
{0x3815, 0x11, 0, 0},
{0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
{0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
};
static const struct ov5640_mode_info ov5640_mode_data[OV5640_NUM_MODES] = {
{
/* 160x120 */
.id = OV5640_MODE_QQVGA_160_120,
.dn_mode = SUBSAMPLING,
.pixel_rate = OV5640_PIXEL_RATE_48M,
.width = 160,
.height = 120,
.dvp_timings = {
.analog_crop = {
.left = 0,
.top = 4,
.width = 2624,
.height = 1944,
},
.crop = {
.left = 16,
.top = 6,
.width = 160,
.height = 120,
},
.htot = 1896,
.vblank_def = 864,
},
.csi2_timings = {
/* Feed the full valid pixel array to the ISP. */
.analog_crop = {
.left = OV5640_PIXEL_ARRAY_LEFT,
.top = OV5640_PIXEL_ARRAY_TOP,
.width = OV5640_PIXEL_ARRAY_WIDTH,
.height = OV5640_PIXEL_ARRAY_HEIGHT,
},
/* Maintain a minimum processing margin. */
.crop = {
.left = 2,
.top = 4,
.width = 160,
.height = 120,
},
.htot = 1600,
.vblank_def = 878,
},
.reg_data = ov5640_setting_low_res,
.reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
.max_fps = OV5640_30_FPS,
.def_fps = OV5640_30_FPS
}, {
/* 176x144 */
.id = OV5640_MODE_QCIF_176_144,
.dn_mode = SUBSAMPLING,
.pixel_rate = OV5640_PIXEL_RATE_48M,
.width = 176,
.height = 144,
.dvp_timings = {
.analog_crop = {
.left = 0,
.top = 4,
.width = 2624,
.height = 1944,
},
.crop = {
.left = 16,
.top = 6,
.width = 176,
.height = 144,
},
.htot = 1896,
.vblank_def = 840,
},
.csi2_timings = {
/* Feed the full valid pixel array to the ISP. */
.analog_crop = {
.left = OV5640_PIXEL_ARRAY_LEFT,
.top = OV5640_PIXEL_ARRAY_TOP,
.width = OV5640_PIXEL_ARRAY_WIDTH,
.height = OV5640_PIXEL_ARRAY_HEIGHT,
},
/* Maintain a minimum processing margin. */
.crop = {
.left = 2,
.top = 4,
.width = 176,
.height = 144,
},
.htot = 1600,
.vblank_def = 854,
},
.reg_data = ov5640_setting_low_res,
.reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
.max_fps = OV5640_30_FPS,
.def_fps = OV5640_30_FPS
}, {
/* 320x240 */
.id = OV5640_MODE_QVGA_320_240,
.dn_mode = SUBSAMPLING,
.width = 320,
.height = 240,
.pixel_rate = OV5640_PIXEL_RATE_48M,
.dvp_timings = {
.analog_crop = {
.left = 0,
.top = 4,
.width = 2624,
.height = 1944,
},
.crop = {
.left = 16,
.top = 6,
.width = 320,
.height = 240,
},
.htot = 1896,
.vblank_def = 744,
},
.csi2_timings = {
/* Feed the full valid pixel array to the ISP. */
.analog_crop = {
.left = OV5640_PIXEL_ARRAY_LEFT,
.top = OV5640_PIXEL_ARRAY_TOP,
.width = OV5640_PIXEL_ARRAY_WIDTH,
.height = OV5640_PIXEL_ARRAY_HEIGHT,
},
/* Maintain a minimum processing margin. */
.crop = {
.left = 2,
.top = 4,
.width = 320,
.height = 240,
},
.htot = 1600,
.vblank_def = 760,
},
.reg_data = ov5640_setting_low_res,
.reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
.max_fps = OV5640_30_FPS,
.def_fps = OV5640_30_FPS
}, {
/* 640x480 */
.id = OV5640_MODE_VGA_640_480,
.dn_mode = SUBSAMPLING,
.pixel_rate = OV5640_PIXEL_RATE_48M,
.width = 640,
.height = 480,
.dvp_timings = {
.analog_crop = {
.left = 0,
.top = 4,
.width = 2624,
.height = 1944,
},
.crop = {
.left = 16,
.top = 6,
.width = 640,
.height = 480,
},
.htot = 1896,
.vblank_def = 600,
},
.csi2_timings = {
/* Feed the full valid pixel array to the ISP. */
.analog_crop = {
.left = OV5640_PIXEL_ARRAY_LEFT,
.top = OV5640_PIXEL_ARRAY_TOP,
.width = OV5640_PIXEL_ARRAY_WIDTH,
.height = OV5640_PIXEL_ARRAY_HEIGHT,
},
/* Maintain a minimum processing margin. */
.crop = {
.left = 2,
.top = 4,
.width = 640,
.height = 480,
},
.htot = 1600,
.vblank_def = 520,
},
.reg_data = ov5640_setting_low_res,
.reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
.max_fps = OV5640_60_FPS,
.def_fps = OV5640_30_FPS
}, {
/* 720x480 */
.id = OV5640_MODE_NTSC_720_480,
.dn_mode = SUBSAMPLING,
.width = 720,
.height = 480,
.pixel_rate = OV5640_PIXEL_RATE_96M,
.dvp_timings = {
.analog_crop = {
.left = 0,
.top = 4,
.width = 2624,
.height = 1944,
},
.crop = {
.left = 56,
.top = 60,
.width = 720,
.height = 480,
},
.htot = 1896,
.vblank_def = 504,
},
.csi2_timings = {
/* Feed the full valid pixel array to the ISP. */
.analog_crop = {
.left = OV5640_PIXEL_ARRAY_LEFT,
.top = OV5640_PIXEL_ARRAY_TOP,
.width = OV5640_PIXEL_ARRAY_WIDTH,
.height = OV5640_PIXEL_ARRAY_HEIGHT,
},
.crop = {
.left = 56,
.top = 60,
.width = 720,
.height = 480,
},
.htot = 1896,
.vblank_def = 1206,
},
.reg_data = ov5640_setting_low_res,
.reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
.max_fps = OV5640_30_FPS,
.def_fps = OV5640_30_FPS
}, {
/* 720x576 */
.id = OV5640_MODE_PAL_720_576,
.dn_mode = SUBSAMPLING,
.width = 720,
.height = 576,
.pixel_rate = OV5640_PIXEL_RATE_96M,
.dvp_timings = {
.analog_crop = {
.left = 0,
.top = 4,
.width = 2624,
.height = 1944,
},
.crop = {
.left = 56,
.top = 6,
.width = 720,
.height = 576,
},
.htot = 1896,
.vblank_def = 408,
},
.csi2_timings = {
/* Feed the full valid pixel array to the ISP. */
.analog_crop = {
.left = OV5640_PIXEL_ARRAY_LEFT,
.top = OV5640_PIXEL_ARRAY_TOP,
.width = OV5640_PIXEL_ARRAY_WIDTH,
.height = OV5640_PIXEL_ARRAY_HEIGHT,
},
.crop = {
.left = 56,
.top = 6,
.width = 720,
.height = 576,
},
.htot = 1896,
.vblank_def = 1110,
},
.reg_data = ov5640_setting_low_res,
.reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
.max_fps = OV5640_30_FPS,
.def_fps = OV5640_30_FPS
}, {
/* 1024x768 */
.id = OV5640_MODE_XGA_1024_768,
.dn_mode = SUBSAMPLING,
.pixel_rate = OV5640_PIXEL_RATE_96M,
.width = 1024,
.height = 768,
.dvp_timings = {
.analog_crop = {
.left = 0,
.top = 4,
.width = 2624,
.height = 1944,
},
.crop = {
.left = 16,
.top = 6,
.width = 1024,
.height = 768,
},
.htot = 1896,
.vblank_def = 312,
},
.csi2_timings = {
.analog_crop = {
.left = 0,
.top = 4,
.width = OV5640_NATIVE_WIDTH,
.height = OV5640_PIXEL_ARRAY_HEIGHT,
},
.crop = {
.left = 16,
.top = 6,
.width = 1024,
.height = 768,
},
.htot = 1896,
.vblank_def = 918,
},
.reg_data = ov5640_setting_low_res,
.reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
.max_fps = OV5640_30_FPS,
.def_fps = OV5640_30_FPS
}, {
/* 1280x720 */
.id = OV5640_MODE_720P_1280_720,
.dn_mode = SUBSAMPLING,
.pixel_rate = OV5640_PIXEL_RATE_124M,
.width = 1280,
.height = 720,
.dvp_timings = {
.analog_crop = {
.left = 0,
.top = 250,
.width = 2624,
.height = 1456,
},
.crop = {
.left = 16,
.top = 4,
.width = 1280,
.height = 720,
},
.htot = 1892,
.vblank_def = 20,
},
.csi2_timings = {
.analog_crop = {
.left = 0,
.top = 250,
.width = 2624,
.height = 1456,
},
.crop = {
.left = 16,
.top = 4,
.width = 1280,
.height = 720,
},
.htot = 1600,
.vblank_def = 560,
},
.reg_data = ov5640_setting_720P_1280_720,
.reg_data_size = ARRAY_SIZE(ov5640_setting_720P_1280_720),
.max_fps = OV5640_30_FPS,
.def_fps = OV5640_30_FPS
}, {
/* 1920x1080 */
.id = OV5640_MODE_1080P_1920_1080,
.dn_mode = SCALING,
.pixel_rate = OV5640_PIXEL_RATE_148M,
.width = 1920,
.height = 1080,
.dvp_timings = {
.analog_crop = {
.left = 336,
.top = 434,
.width = 1952,
.height = 1088,
},
.crop = {
.left = 16,
.top = 4,
.width = 1920,
.height = 1080,
},
.htot = 2500,
.vblank_def = 40,
},
.csi2_timings = {
/* Crop the full valid pixel array in the center. */
.analog_crop = {
.left = 336,
.top = 434,
.width = 1952,
.height = 1088,
},
/* Maintain a larger processing margins. */
.crop = {
.left = 16,
.top = 4,
.width = 1920,
.height = 1080,
},
.htot = 2234,
.vblank_def = 24,
},
.reg_data = ov5640_setting_1080P_1920_1080,
.reg_data_size = ARRAY_SIZE(ov5640_setting_1080P_1920_1080),
.max_fps = OV5640_30_FPS,
.def_fps = OV5640_30_FPS
}, {
/* 2592x1944 */
.id = OV5640_MODE_QSXGA_2592_1944,
.dn_mode = SCALING,
.pixel_rate = OV5640_PIXEL_RATE_168M,
.width = OV5640_PIXEL_ARRAY_WIDTH,
.height = OV5640_PIXEL_ARRAY_HEIGHT,
.dvp_timings = {
.analog_crop = {
.left = 0,
.top = 0,
.width = 2624,
.height = 1952,
},
.crop = {
.left = 16,
.top = 4,
.width = 2592,
.height = 1944,
},
.htot = 2844,
.vblank_def = 24,
},
.csi2_timings = {
/* Give more processing margin to full resolution. */
.analog_crop = {
.left = 0,
.top = 0,
.width = OV5640_NATIVE_WIDTH,
.height = 1952,
},
.crop = {
.left = 16,
.top = 4,
.width = 2592,
.height = 1944,
},
.htot = 2844,
.vblank_def = 24,
},
.reg_data = ov5640_setting_QSXGA_2592_1944,
.reg_data_size = ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944),
.max_fps = OV5640_15_FPS,
.def_fps = OV5640_15_FPS
},
};
static const struct ov5640_timings *
ov5640_timings(const struct ov5640_dev *sensor,
const struct ov5640_mode_info *mode)
{
if (ov5640_is_csi2(sensor))
return &mode->csi2_timings;
return &mode->dvp_timings;
}
static int ov5640_init_slave_id(struct ov5640_dev *sensor)
{
struct i2c_client *client = sensor->i2c_client;
struct i2c_msg msg;
u8 buf[3];
int ret;
if (client->addr == OV5640_DEFAULT_SLAVE_ID)
return 0;
buf[0] = OV5640_REG_SLAVE_ID >> 8;
buf[1] = OV5640_REG_SLAVE_ID & 0xff;
buf[2] = client->addr << 1;
msg.addr = OV5640_DEFAULT_SLAVE_ID;
msg.flags = 0;
msg.buf = buf;
msg.len = sizeof(buf);
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret < 0) {
dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
return ret;
}
return 0;
}
static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
{
struct i2c_client *client = sensor->i2c_client;
struct i2c_msg msg;
u8 buf[3];
int ret;
buf[0] = reg >> 8;
buf[1] = reg & 0xff;
buf[2] = val;
msg.addr = client->addr;
msg.flags = client->flags;
msg.buf = buf;
msg.len = sizeof(buf);
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret < 0) {
dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
__func__, reg, val);
return ret;
}
return 0;
}
static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
{
struct i2c_client *client = sensor->i2c_client;
struct i2c_msg msg[2];
u8 buf[2];
int ret;
buf[0] = reg >> 8;
buf[1] = reg & 0xff;
msg[0].addr = client->addr;
msg[0].flags = client->flags;
msg[0].buf = buf;
msg[0].len = sizeof(buf);
msg[1].addr = client->addr;
msg[1].flags = client->flags | I2C_M_RD;
msg[1].buf = buf;
msg[1].len = 1;
ret = i2c_transfer(client->adapter, msg, 2);
if (ret < 0) {
dev_err(&client->dev, "%s: error: reg=%x\n",
__func__, reg);
return ret;
}
*val = buf[0];
return 0;
}
static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
{
u8 hi, lo;
int ret;
ret = ov5640_read_reg(sensor, reg, &hi);
if (ret)
return ret;
ret = ov5640_read_reg(sensor, reg + 1, &lo);
if (ret)
return ret;
*val = ((u16)hi << 8) | (u16)lo;
return 0;
}
static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
{
int ret;
ret = ov5640_write_reg(sensor, reg, val >> 8);
if (ret)
return ret;
return ov5640_write_reg(sensor, reg + 1, val & 0xff);
}
static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
u8 mask, u8 val)
{
u8 readval;
int ret;
ret = ov5640_read_reg(sensor, reg, &readval);
if (ret)
return ret;
readval &= ~mask;
val &= mask;
val |= readval;
return ov5640_write_reg(sensor, reg, val);
}
/*
* After trying the various combinations, reading various
* documentations spread around the net, and from the various
* feedback, the clock tree is probably as follows:
*
* +--------------+
* | Ext. Clock |
* +-+------------+
* | +----------+
* +->| PLL1 | - reg 0x3036, for the multiplier
* +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
* | +--------------+
* +->| System Clock | - reg 0x3035, bits 4-7
* +-+------------+
* | +--------------+
* +->| MIPI Divider | - reg 0x3035, bits 0-3
* | +-+------------+
* | +----------------> MIPI SCLK
* | + +-----+
* | +->| / 2 |-------> MIPI BIT CLK
* | +-----+
* | +--------------+
* +->| PLL Root Div | - reg 0x3037, bit 4
* +-+------------+
* | +---------+
* +->| Bit Div | - reg 0x3034, bits 0-3
* +-+-------+
* | +-------------+
* +->| SCLK Div | - reg 0x3108, bits 0-1
* | +-+-----------+
* | +---------------> SCLK
* | +-------------+
* +->| SCLK 2X Div | - reg 0x3108, bits 2-3
* | +-+-----------+
* | +---------------> SCLK 2X
* | +-------------+
* +->| PCLK Div | - reg 0x3108, bits 4-5
* ++------------+
* + +-----------+
* +->| P_DIV | - reg 0x3035, bits 0-3
* +-----+-----+
* +------------> PCLK
*
* There seems to be also constraints:
* - the PLL pre-divider output rate should be in the 4-27MHz range
* - the PLL multiplier output rate should be in the 500-1000MHz range
* - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
*/
/*
* This is supposed to be ranging from 1 to 8, but the value is always
* set to 3 in the vendor kernels.
*/
#define OV5640_PLL_PREDIV 3
#define OV5640_PLL_MULT_MIN 4
#define OV5640_PLL_MULT_MAX 252
/*
* This is supposed to be ranging from 1 to 16, but the value is
* always set to either 1 or 2 in the vendor kernels.
*/
#define OV5640_SYSDIV_MIN 1
#define OV5640_SYSDIV_MAX 16
/*
* This is supposed to be ranging from 1 to 2, but the value is always
* set to 2 in the vendor kernels.
*/
#define OV5640_PLL_ROOT_DIV 2
#define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)
/*
* We only supports 8-bit formats at the moment
*/
#define OV5640_BIT_DIV 2
#define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08
/*
* This is supposed to be ranging from 1 to 8, but the value is always
* set to 2 in the vendor kernels.
*/
#define OV5640_SCLK_ROOT_DIV 2
/*
* This is hardcoded so that the consistency is maintained between SCLK and
* SCLK 2x.
*/
#define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
/*
* This is supposed to be ranging from 1 to 8, but the value is always
* set to 1 in the vendor kernels.
*/
#define OV5640_PCLK_ROOT_DIV 1
#define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00
static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
u8 pll_prediv, u8 pll_mult,
u8 sysdiv)
{
unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
/* PLL1 output cannot exceed 1GHz. */
if (sysclk / 1000000 > 1000)
return 0;
return sysclk / sysdiv;
}
static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
unsigned long rate,
u8 *pll_prediv, u8 *pll_mult,
u8 *sysdiv)
{
unsigned long best = ~0;
u8 best_sysdiv = 1, best_mult = 1;
u8 _sysdiv, _pll_mult;
for (_sysdiv = OV5640_SYSDIV_MIN;
_sysdiv <= OV5640_SYSDIV_MAX;
_sysdiv++) {
for (_pll_mult = OV5640_PLL_MULT_MIN;
_pll_mult <= OV5640_PLL_MULT_MAX;
_pll_mult++) {
unsigned long _rate;
/*
* The PLL multiplier cannot be odd if above
* 127.
*/
if (_pll_mult > 127 && (_pll_mult % 2))
continue;
_rate = ov5640_compute_sys_clk(sensor,
OV5640_PLL_PREDIV,
_pll_mult, _sysdiv);
/*
* We have reached the maximum allowed PLL1 output,
* increase sysdiv.
*/
if (!_rate)
break;
/*
* Prefer rates above the expected clock rate than
* below, even if that means being less precise.
*/
if (_rate < rate)
continue;
if (abs(rate - _rate) < abs(rate - best)) {
best = _rate;
best_sysdiv = _sysdiv;
best_mult = _pll_mult;
}
if (_rate == rate)
goto out;
}
}
out:
*sysdiv = best_sysdiv;
*pll_prediv = OV5640_PLL_PREDIV;
*pll_mult = best_mult;
return best;
}
/*
* ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
* for the MIPI CSI-2 output.
*/
static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor)
{
u8 bit_div, mipi_div, pclk_div, sclk_div, sclk2x_div, root_div;
u8 prediv, mult, sysdiv;
unsigned long link_freq;
unsigned long sysclk;
u8 pclk_period;
u32 sample_rate;
u32 num_lanes;
int ret;
/* Use the link freq computed at ov5640_update_pixel_rate() time. */
link_freq = sensor->current_link_freq;
/*
* - mipi_div - Additional divider for the MIPI lane clock.
*
* Higher link frequencies would make sysclk > 1GHz.
* Keep the sysclk low and do not divide in the MIPI domain.
*/
if (link_freq > OV5640_LINK_RATE_MAX)
mipi_div = 1;
else
mipi_div = 2;
sysclk = link_freq * mipi_div;
ov5640_calc_sys_clk(sensor, sysclk, &prediv, &mult, &sysdiv);
/*
* Adjust PLL parameters to maintain the MIPI_SCLK-to-PCLK ratio.
*
* - root_div = 2 (fixed)
* - bit_div : MIPI 8-bit = 2; MIPI 10-bit = 2.5
* - pclk_div = 1 (fixed)
* - p_div = (2 lanes ? mipi_div : 2 * mipi_div)
*
* This results in the following MIPI_SCLK depending on the number
* of lanes:
*
* - 2 lanes: MIPI_SCLK = (4 or 5) * PCLK
* - 1 lanes: MIPI_SCLK = (8 or 10) * PCLK
*/
root_div = OV5640_PLL_CTRL3_PLL_ROOT_DIV_2;
bit_div = OV5640_PLL_CTRL0_MIPI_MODE_8BIT;
pclk_div = ilog2(OV5640_PCLK_ROOT_DIV);
/*
* Scaler clock:
* - YUV: PCLK >= 2 * SCLK
* - RAW or JPEG: PCLK >= SCLK
* - sclk2x_div = sclk_div / 2
*/
sclk_div = ilog2(OV5640_SCLK_ROOT_DIV);
sclk2x_div = ilog2(OV5640_SCLK2X_ROOT_DIV);
/*
* Set the pixel clock period expressed in ns with 1-bit decimal
* (0x01=0.5ns).
*
* The register is very briefly documented. In the OV5645 datasheet it
* is described as (2 * pclk period), and from testing it seems the
* actual definition is 2 * 8-bit sample period.
*
* 2 * sample_period = (mipi_clk * 2 * num_lanes / bpp) * (bpp / 8) / 2
*/
num_lanes = sensor->ep.bus.mipi_csi2.num_data_lanes;
sample_rate = (link_freq * mipi_div * num_lanes * 2) / 16;
pclk_period = 2000000000UL / sample_rate;
/* Program the clock tree registers. */
ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, 0x0f, bit_div);
if (ret)
return ret;
ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 0xff,
(sysdiv << 4) | mipi_div);
if (ret)
return ret;
ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
if (ret)
return ret;
ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, 0x1f,
root_div | prediv);
if (ret)
return ret;
ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
(pclk_div << 4) | (sclk2x_div << 2) | sclk_div);
if (ret)
return ret;
return ov5640_write_reg(sensor, OV5640_REG_PCLK_PERIOD, pclk_period);
}
static u32 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
{
const struct ov5640_mode_info *mode = sensor->current_mode;
const struct ov5640_timings *timings = &mode->dvp_timings;
u32 rate;
rate = timings->htot * (timings->crop.height + timings->vblank_def);
rate *= ov5640_framerates[sensor->current_fr];
return rate;
}
static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
unsigned long rate,
u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
{
unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
OV5640_PCLK_ROOT_DIV;
_rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
sysdiv);
*pll_rdiv = OV5640_PLL_ROOT_DIV;
*bit_div = OV5640_BIT_DIV;
*pclk_div = OV5640_PCLK_ROOT_DIV;
return _rate / *pll_rdiv / *bit_div / *pclk_div;
}
static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor)
{
u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
u32 rate;
int ret;
rate = ov5640_calc_pixel_rate(sensor);
rate *= ov5640_code_to_bpp(sensor, sensor->fmt.code);
rate /= sensor->ep.bus.parallel.bus_width;
ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
&bit_div, &pclk_div);
if (bit_div == 2)
bit_div = 8;
ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
0x0f, bit_div);
if (ret)
return ret;
/*
* We need to set sysdiv according to the clock, and to clear
* the MIPI divider.
*/
ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
0xff, sysdiv << 4);
if (ret)
return ret;
ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
0xff, mult);
if (ret)
return ret;
ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
0x1f, prediv | ((pll_rdiv - 1) << 4));
if (ret)
return ret;
return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
(ilog2(pclk_div) << 4));
}
/* set JPEG framing sizes */
static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
const struct ov5640_mode_info *mode)
{
int ret;
/*
* compression mode 3 timing
*
* Data is transmitted with programmable width (VFIFO_HSIZE).
* No padding done. Last line may have less data. Varying
* number of lines per frame, depending on amount of data.
*/
ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->width);
if (ret < 0)
return ret;
return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->height);
}
/* download ov5640 settings to sensor through i2c */
static int ov5640_set_timings(struct ov5640_dev *sensor,
const struct ov5640_mode_info *mode)
{
const struct ov5640_timings *timings;
const struct v4l2_rect *analog_crop;
const struct v4l2_rect *crop;
int ret;
if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
ret = ov5640_set_jpeg_timings(sensor, mode);
if (ret < 0)
return ret;
}
timings = ov5640_timings(sensor, mode);
analog_crop = &timings->analog_crop;
crop = &timings->crop;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HS,
analog_crop->left);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VS,
analog_crop->top);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HW,
analog_crop->left + analog_crop->width - 1);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VH,
analog_crop->top + analog_crop->height - 1);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HOFFS, crop->left);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VOFFS, crop->top);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->width);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->height);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, timings->htot);
if (ret < 0)
return ret;
ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS,
mode->height + timings->vblank_def);
if (ret < 0)
return ret;
return 0;
}
static void ov5640_load_regs(struct ov5640_dev *sensor,
const struct reg_value *regs, unsigned int regnum)
{
unsigned int i;
u32 delay_ms;
u16 reg_addr;
u8 mask, val;
int ret = 0;
for (i = 0; i < regnum; ++i, ++regs) {
delay_ms = regs->delay_ms;
reg_addr = regs->reg_addr;
val = regs->val;
mask = regs->mask;
/* remain in power down mode for DVP */
if (regs->reg_addr == OV5640_REG_SYS_CTRL0 &&
val == OV5640_REG_SYS_CTRL0_SW_PWUP &&
!ov5640_is_csi2(sensor))
continue;
if (mask)
ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
else
ret = ov5640_write_reg(sensor, reg_addr, val);
if (ret)
break;
if (delay_ms)
usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
}
}
static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
{
return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
BIT(0), on ? 0 : BIT(0));
}
/* read exposure, in number of line periods */
static int ov5640_get_exposure(struct ov5640_dev *sensor)
{
int exp, ret;
u8 temp;
ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
if (ret)
return ret;
exp = ((int)temp & 0x0f) << 16;
ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
if (ret)
return ret;
exp |= ((int)temp << 8);
ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
if (ret)
return ret;
exp |= (int)temp;
return exp >> 4;
}
/* write exposure, given number of line periods */
static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)