75 lines
1.5 KiB
C
75 lines
1.5 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2013-2016 Freescale Semiconductor Inc.
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* Copyright 2016-2018 NXP
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*/
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#ifndef _FSL_DPRTC_CMD_H
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#define _FSL_DPRTC_CMD_H
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/* Command versioning */
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#define DPRTC_CMD_BASE_VERSION 1
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#define DPRTC_CMD_VERSION_2 2
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#define DPRTC_CMD_ID_OFFSET 4
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#define DPRTC_CMD(id) (((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
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#define DPRTC_CMD_V2(id) (((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_VERSION_2)
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/* Command IDs */
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#define DPRTC_CMDID_CLOSE DPRTC_CMD(0x800)
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#define DPRTC_CMDID_OPEN DPRTC_CMD(0x810)
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#define DPRTC_CMDID_SET_IRQ_ENABLE DPRTC_CMD(0x012)
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#define DPRTC_CMDID_GET_IRQ_ENABLE DPRTC_CMD(0x013)
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#define DPRTC_CMDID_SET_IRQ_MASK DPRTC_CMD_V2(0x014)
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#define DPRTC_CMDID_GET_IRQ_MASK DPRTC_CMD(0x015)
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#define DPRTC_CMDID_GET_IRQ_STATUS DPRTC_CMD(0x016)
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#define DPRTC_CMDID_CLEAR_IRQ_STATUS DPRTC_CMD(0x017)
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#pragma pack(push, 1)
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struct dprtc_cmd_open {
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__le32 dprtc_id;
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};
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struct dprtc_cmd_get_irq {
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__le32 pad;
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u8 irq_index;
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};
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struct dprtc_cmd_set_irq_enable {
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u8 en;
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u8 pad[3];
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u8 irq_index;
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};
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struct dprtc_rsp_get_irq_enable {
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u8 en;
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};
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struct dprtc_cmd_set_irq_mask {
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__le32 mask;
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u8 irq_index;
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};
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struct dprtc_rsp_get_irq_mask {
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__le32 mask;
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};
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struct dprtc_cmd_get_irq_status {
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__le32 status;
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u8 irq_index;
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};
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struct dprtc_rsp_get_irq_status {
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__le32 status;
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};
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struct dprtc_cmd_clear_irq_status {
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__le32 status;
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u8 irq_index;
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};
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#pragma pack(pop)
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#endif /* _FSL_DPRTC_CMD_H */
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