364 lines
8.7 KiB
C
364 lines
8.7 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* dwmac-imx.c - DWMAC Specific Glue layer for NXP imx8
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*
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* Copyright 2020 NXP
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*
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*/
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#include <linux/clk.h>
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#include <linux/gpio/consumer.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_net.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/pm_wakeirq.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/stmmac.h>
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#include "stmmac_platform.h"
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#define GPR_ENET_QOS_INTF_MODE_MASK GENMASK(21, 16)
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#define GPR_ENET_QOS_INTF_SEL_MII (0x0 << 16)
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#define GPR_ENET_QOS_INTF_SEL_RMII (0x4 << 16)
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#define GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 16)
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#define GPR_ENET_QOS_CLK_GEN_EN (0x1 << 19)
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#define GPR_ENET_QOS_CLK_TX_CLK_SEL (0x1 << 20)
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#define GPR_ENET_QOS_RGMII_EN (0x1 << 21)
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#define MX93_GPR_ENET_QOS_INTF_MODE_MASK GENMASK(3, 0)
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#define MX93_GPR_ENET_QOS_INTF_SEL_MII (0x0 << 1)
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#define MX93_GPR_ENET_QOS_INTF_SEL_RMII (0x4 << 1)
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#define MX93_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1)
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#define MX93_GPR_ENET_QOS_CLK_GEN_EN (0x1 << 0)
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struct imx_dwmac_ops {
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u32 addr_width;
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bool mac_rgmii_txclk_auto_adj;
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int (*set_intf_mode)(struct plat_stmmacenet_data *plat_dat);
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};
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struct imx_priv_data {
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struct device *dev;
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struct clk *clk_tx;
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struct clk *clk_mem;
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struct regmap *intf_regmap;
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u32 intf_reg_off;
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bool rmii_refclk_ext;
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const struct imx_dwmac_ops *ops;
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struct plat_stmmacenet_data *plat_dat;
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};
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static int imx8mp_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
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{
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struct imx_priv_data *dwmac = plat_dat->bsp_priv;
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int val;
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switch (plat_dat->interface) {
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case PHY_INTERFACE_MODE_MII:
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val = GPR_ENET_QOS_INTF_SEL_MII;
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break;
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case PHY_INTERFACE_MODE_RMII:
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val = GPR_ENET_QOS_INTF_SEL_RMII;
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val |= (dwmac->rmii_refclk_ext ? 0 : GPR_ENET_QOS_CLK_TX_CLK_SEL);
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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val = GPR_ENET_QOS_INTF_SEL_RGMII |
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GPR_ENET_QOS_RGMII_EN;
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break;
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default:
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pr_debug("imx dwmac doesn't support %d interface\n",
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plat_dat->interface);
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return -EINVAL;
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}
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val |= GPR_ENET_QOS_CLK_GEN_EN;
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return regmap_update_bits(dwmac->intf_regmap, dwmac->intf_reg_off,
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GPR_ENET_QOS_INTF_MODE_MASK, val);
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};
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static int
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imx8dxl_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
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{
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int ret = 0;
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/* TBD: depends on imx8dxl scu interfaces to be upstreamed */
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return ret;
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}
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static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
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{
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struct imx_priv_data *dwmac = plat_dat->bsp_priv;
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int val;
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switch (plat_dat->interface) {
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case PHY_INTERFACE_MODE_MII:
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val = MX93_GPR_ENET_QOS_INTF_SEL_MII;
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break;
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case PHY_INTERFACE_MODE_RMII:
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val = MX93_GPR_ENET_QOS_INTF_SEL_RMII;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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val = MX93_GPR_ENET_QOS_INTF_SEL_RGMII;
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break;
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default:
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dev_dbg(dwmac->dev, "imx dwmac doesn't support %d interface\n",
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plat_dat->interface);
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return -EINVAL;
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}
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val |= MX93_GPR_ENET_QOS_CLK_GEN_EN;
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return regmap_update_bits(dwmac->intf_regmap, dwmac->intf_reg_off,
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MX93_GPR_ENET_QOS_INTF_MODE_MASK, val);
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};
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static int imx_dwmac_clks_config(void *priv, bool enabled)
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{
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struct imx_priv_data *dwmac = priv;
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int ret = 0;
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if (enabled) {
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ret = clk_prepare_enable(dwmac->clk_mem);
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if (ret) {
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dev_err(dwmac->dev, "mem clock enable failed\n");
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return ret;
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}
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ret = clk_prepare_enable(dwmac->clk_tx);
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if (ret) {
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dev_err(dwmac->dev, "tx clock enable failed\n");
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clk_disable_unprepare(dwmac->clk_mem);
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return ret;
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}
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} else {
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clk_disable_unprepare(dwmac->clk_tx);
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clk_disable_unprepare(dwmac->clk_mem);
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}
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return ret;
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}
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static int imx_dwmac_init(struct platform_device *pdev, void *priv)
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{
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struct plat_stmmacenet_data *plat_dat;
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struct imx_priv_data *dwmac = priv;
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int ret;
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plat_dat = dwmac->plat_dat;
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if (dwmac->ops->set_intf_mode) {
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ret = dwmac->ops->set_intf_mode(plat_dat);
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if (ret)
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return ret;
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}
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return 0;
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}
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static void imx_dwmac_exit(struct platform_device *pdev, void *priv)
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{
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/* nothing to do now */
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}
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static void imx_dwmac_fix_speed(void *priv, unsigned int speed)
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{
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struct plat_stmmacenet_data *plat_dat;
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struct imx_priv_data *dwmac = priv;
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unsigned long rate;
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int err;
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plat_dat = dwmac->plat_dat;
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if (dwmac->ops->mac_rgmii_txclk_auto_adj ||
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(plat_dat->interface == PHY_INTERFACE_MODE_RMII) ||
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(plat_dat->interface == PHY_INTERFACE_MODE_MII))
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return;
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switch (speed) {
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case SPEED_1000:
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rate = 125000000;
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break;
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case SPEED_100:
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rate = 25000000;
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break;
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case SPEED_10:
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rate = 2500000;
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break;
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default:
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dev_err(dwmac->dev, "invalid speed %u\n", speed);
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return;
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}
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err = clk_set_rate(dwmac->clk_tx, rate);
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if (err < 0)
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dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
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}
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static int
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imx_dwmac_parse_dt(struct imx_priv_data *dwmac, struct device *dev)
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{
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struct device_node *np = dev->of_node;
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int err = 0;
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dwmac->rmii_refclk_ext = of_property_read_bool(np, "snps,rmii_refclk_ext");
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dwmac->clk_tx = devm_clk_get(dev, "tx");
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if (IS_ERR(dwmac->clk_tx)) {
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dev_err(dev, "failed to get tx clock\n");
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return PTR_ERR(dwmac->clk_tx);
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}
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dwmac->clk_mem = NULL;
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if (of_machine_is_compatible("fsl,imx8dxl") ||
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of_machine_is_compatible("fsl,imx93")) {
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dwmac->clk_mem = devm_clk_get(dev, "mem");
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if (IS_ERR(dwmac->clk_mem)) {
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dev_err(dev, "failed to get mem clock\n");
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return PTR_ERR(dwmac->clk_mem);
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}
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}
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if (of_machine_is_compatible("fsl,imx8mp") ||
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of_machine_is_compatible("fsl,imx93")) {
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/* Binding doc describes the propety:
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* is required by i.MX8MP, i.MX93.
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* is optinoal for i.MX8DXL.
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*/
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dwmac->intf_regmap = syscon_regmap_lookup_by_phandle(np, "intf_mode");
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if (IS_ERR(dwmac->intf_regmap))
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return PTR_ERR(dwmac->intf_regmap);
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err = of_property_read_u32_index(np, "intf_mode", 1, &dwmac->intf_reg_off);
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if (err) {
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dev_err(dev, "Can't get intf mode reg offset (%d)\n", err);
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return err;
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}
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}
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return err;
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}
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static int imx_dwmac_probe(struct platform_device *pdev)
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{
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struct plat_stmmacenet_data *plat_dat;
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struct stmmac_resources stmmac_res;
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struct imx_priv_data *dwmac;
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const struct imx_dwmac_ops *data;
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int ret;
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ret = stmmac_get_platform_resources(pdev, &stmmac_res);
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if (ret)
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return ret;
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dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
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if (!dwmac)
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return -ENOMEM;
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plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
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if (IS_ERR(plat_dat))
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return PTR_ERR(plat_dat);
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data = of_device_get_match_data(&pdev->dev);
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if (!data) {
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dev_err(&pdev->dev, "failed to get match data\n");
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ret = -EINVAL;
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goto err_match_data;
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}
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dwmac->ops = data;
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dwmac->dev = &pdev->dev;
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ret = imx_dwmac_parse_dt(dwmac, &pdev->dev);
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if (ret) {
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dev_err(&pdev->dev, "failed to parse OF data\n");
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goto err_parse_dt;
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}
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plat_dat->host_dma_width = dwmac->ops->addr_width;
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plat_dat->init = imx_dwmac_init;
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plat_dat->exit = imx_dwmac_exit;
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plat_dat->clks_config = imx_dwmac_clks_config;
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plat_dat->fix_mac_speed = imx_dwmac_fix_speed;
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plat_dat->bsp_priv = dwmac;
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dwmac->plat_dat = plat_dat;
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ret = imx_dwmac_clks_config(dwmac, true);
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if (ret)
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goto err_clks_config;
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ret = imx_dwmac_init(pdev, dwmac);
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if (ret)
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goto err_dwmac_init;
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ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
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if (ret)
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goto err_drv_probe;
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return 0;
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err_drv_probe:
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imx_dwmac_exit(pdev, plat_dat->bsp_priv);
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err_dwmac_init:
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imx_dwmac_clks_config(dwmac, false);
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err_clks_config:
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err_parse_dt:
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err_match_data:
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stmmac_remove_config_dt(pdev, plat_dat);
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return ret;
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}
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static struct imx_dwmac_ops imx8mp_dwmac_data = {
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.addr_width = 34,
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.mac_rgmii_txclk_auto_adj = false,
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.set_intf_mode = imx8mp_set_intf_mode,
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};
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static struct imx_dwmac_ops imx8dxl_dwmac_data = {
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.addr_width = 32,
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.mac_rgmii_txclk_auto_adj = true,
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.set_intf_mode = imx8dxl_set_intf_mode,
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};
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static struct imx_dwmac_ops imx93_dwmac_data = {
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.addr_width = 32,
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.mac_rgmii_txclk_auto_adj = true,
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.set_intf_mode = imx93_set_intf_mode,
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};
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static const struct of_device_id imx_dwmac_match[] = {
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{ .compatible = "nxp,imx8mp-dwmac-eqos", .data = &imx8mp_dwmac_data },
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{ .compatible = "nxp,imx8dxl-dwmac-eqos", .data = &imx8dxl_dwmac_data },
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{ .compatible = "nxp,imx93-dwmac-eqos", .data = &imx93_dwmac_data },
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{ }
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};
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MODULE_DEVICE_TABLE(of, imx_dwmac_match);
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static struct platform_driver imx_dwmac_driver = {
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.probe = imx_dwmac_probe,
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.remove = stmmac_pltfr_remove,
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|
.driver = {
|
||
|
|
.name = "imx-dwmac",
|
||
|
|
.pm = &stmmac_pltfr_pm_ops,
|
||
|
|
.of_match_table = imx_dwmac_match,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
module_platform_driver(imx_dwmac_driver);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("NXP");
|
||
|
|
MODULE_DESCRIPTION("NXP imx8 DWMAC Specific Glue layer");
|
||
|
|
MODULE_LICENSE("GPL v2");
|