289 lines
7.7 KiB
C
289 lines
7.7 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* OTP Memory controller
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*
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* Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
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*
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* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
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*/
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#include <linux/bitfield.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#define MCHP_OTPC_CR (0x0)
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#define MCHP_OTPC_CR_READ BIT(6)
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#define MCHP_OTPC_MR (0x4)
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#define MCHP_OTPC_MR_ADDR GENMASK(31, 16)
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#define MCHP_OTPC_AR (0x8)
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#define MCHP_OTPC_SR (0xc)
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#define MCHP_OTPC_SR_READ BIT(6)
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#define MCHP_OTPC_HR (0x20)
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#define MCHP_OTPC_HR_SIZE GENMASK(15, 8)
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#define MCHP_OTPC_DR (0x24)
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#define MCHP_OTPC_NAME "mchp-otpc"
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#define MCHP_OTPC_SIZE (11 * 1024)
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/**
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* struct mchp_otpc - OTPC private data structure
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* @base: base address
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* @dev: struct device pointer
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* @packets: list of packets in OTP memory
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* @npackets: number of packets in OTP memory
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*/
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struct mchp_otpc {
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void __iomem *base;
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struct device *dev;
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struct list_head packets;
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u32 npackets;
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};
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/**
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* struct mchp_otpc_packet - OTPC packet data structure
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* @list: list head
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* @id: packet ID
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* @offset: packet offset (in words) in OTP memory
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*/
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struct mchp_otpc_packet {
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struct list_head list;
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u32 id;
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u32 offset;
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};
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static struct mchp_otpc_packet *mchp_otpc_id_to_packet(struct mchp_otpc *otpc,
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u32 id)
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{
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struct mchp_otpc_packet *packet;
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if (id >= otpc->npackets)
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return NULL;
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list_for_each_entry(packet, &otpc->packets, list) {
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if (packet->id == id)
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return packet;
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}
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return NULL;
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}
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static int mchp_otpc_prepare_read(struct mchp_otpc *otpc,
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unsigned int offset)
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{
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u32 tmp;
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/* Set address. */
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tmp = readl_relaxed(otpc->base + MCHP_OTPC_MR);
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tmp &= ~MCHP_OTPC_MR_ADDR;
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tmp |= FIELD_PREP(MCHP_OTPC_MR_ADDR, offset);
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writel_relaxed(tmp, otpc->base + MCHP_OTPC_MR);
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/* Set read. */
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tmp = readl_relaxed(otpc->base + MCHP_OTPC_CR);
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tmp |= MCHP_OTPC_CR_READ;
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writel_relaxed(tmp, otpc->base + MCHP_OTPC_CR);
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/* Wait for packet to be transferred into temporary buffers. */
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return read_poll_timeout(readl_relaxed, tmp, !(tmp & MCHP_OTPC_SR_READ),
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10000, 2000, false, otpc->base + MCHP_OTPC_SR);
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}
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/*
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* OTPC memory is organized into packets. Each packets contains a header and
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* a payload. Header is 4 bytes long and contains the size of the payload.
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* Payload size varies. The memory footprint is something as follows:
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*
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* Memory offset Memory footprint Packet ID
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* ------------- ---------------- ---------
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*
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* 0x0 +------------+ <-- packet 0
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* | header 0 |
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* 0x4 +------------+
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* | payload 0 |
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* . .
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* . ... .
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* . .
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* offset1 +------------+ <-- packet 1
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* | header 1 |
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* offset1 + 0x4 +------------+
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* | payload 1 |
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* . .
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* . ... .
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* . .
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* offset2 +------------+ <-- packet 2
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* . .
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* . ... .
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* . .
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* offsetN +------------+ <-- packet N
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* | header N |
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* offsetN + 0x4 +------------+
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* | payload N |
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* . .
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* . ... .
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* . .
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* +------------+
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*
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* where offset1, offset2, offsetN depends on the size of payload 0, payload 1,
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* payload N-1.
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*
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* The access to memory is done on a per packet basis: the control registers
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* need to be updated with an offset address (within a packet range) and the
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* data registers will be update by controller with information contained by
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* that packet. E.g. if control registers are updated with any address within
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* the range [offset1, offset2) the data registers are updated by controller
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* with packet 1. Header data is accessible though MCHP_OTPC_HR register.
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* Payload data is accessible though MCHP_OTPC_DR and MCHP_OTPC_AR registers.
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* There is no direct mapping b/w the offset requested by software and the
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* offset returned by hardware.
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*
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* For this, the read function will return the first requested bytes in the
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* packet. The user will have to be aware of the memory footprint before doing
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* the read request.
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*/
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static int mchp_otpc_read(void *priv, unsigned int off, void *val,
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size_t bytes)
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{
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struct mchp_otpc *otpc = priv;
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struct mchp_otpc_packet *packet;
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u32 *buf = val;
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u32 offset;
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size_t len = 0;
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int ret, payload_size;
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/*
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* We reach this point with off being multiple of stride = 4 to
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* be able to cross the subsystem. Inside the driver we use continuous
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* unsigned integer numbers for packet id, thus devide off by 4
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* before passing it to mchp_otpc_id_to_packet().
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*/
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packet = mchp_otpc_id_to_packet(otpc, off / 4);
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if (!packet)
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return -EINVAL;
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offset = packet->offset;
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while (len < bytes) {
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ret = mchp_otpc_prepare_read(otpc, offset);
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if (ret)
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return ret;
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/* Read and save header content. */
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*buf++ = readl_relaxed(otpc->base + MCHP_OTPC_HR);
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len += sizeof(*buf);
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offset++;
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if (len >= bytes)
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break;
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/* Read and save payload content. */
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payload_size = FIELD_GET(MCHP_OTPC_HR_SIZE, *(buf - 1));
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writel_relaxed(0UL, otpc->base + MCHP_OTPC_AR);
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do {
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*buf++ = readl_relaxed(otpc->base + MCHP_OTPC_DR);
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len += sizeof(*buf);
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offset++;
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payload_size--;
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} while (payload_size >= 0 && len < bytes);
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}
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return 0;
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}
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static int mchp_otpc_init_packets_list(struct mchp_otpc *otpc, u32 *size)
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{
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struct mchp_otpc_packet *packet;
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u32 word, word_pos = 0, id = 0, npackets = 0, payload_size;
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int ret;
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INIT_LIST_HEAD(&otpc->packets);
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*size = 0;
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while (*size < MCHP_OTPC_SIZE) {
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ret = mchp_otpc_prepare_read(otpc, word_pos);
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if (ret)
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return ret;
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word = readl_relaxed(otpc->base + MCHP_OTPC_HR);
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payload_size = FIELD_GET(MCHP_OTPC_HR_SIZE, word);
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if (!payload_size)
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break;
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packet = devm_kzalloc(otpc->dev, sizeof(*packet), GFP_KERNEL);
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if (!packet)
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return -ENOMEM;
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packet->id = id++;
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packet->offset = word_pos;
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INIT_LIST_HEAD(&packet->list);
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list_add_tail(&packet->list, &otpc->packets);
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/* Count size by adding header and paload sizes. */
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*size += 4 * (payload_size + 1);
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/* Next word: this packet (header, payload) position + 1. */
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word_pos += payload_size + 2;
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npackets++;
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}
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otpc->npackets = npackets;
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return 0;
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}
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static struct nvmem_config mchp_nvmem_config = {
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.name = MCHP_OTPC_NAME,
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.type = NVMEM_TYPE_OTP,
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.read_only = true,
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.word_size = 4,
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.stride = 4,
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.reg_read = mchp_otpc_read,
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};
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static int mchp_otpc_probe(struct platform_device *pdev)
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{
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struct nvmem_device *nvmem;
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struct mchp_otpc *otpc;
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u32 size;
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int ret;
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otpc = devm_kzalloc(&pdev->dev, sizeof(*otpc), GFP_KERNEL);
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if (!otpc)
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return -ENOMEM;
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otpc->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(otpc->base))
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return PTR_ERR(otpc->base);
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otpc->dev = &pdev->dev;
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ret = mchp_otpc_init_packets_list(otpc, &size);
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if (ret)
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return ret;
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mchp_nvmem_config.dev = otpc->dev;
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mchp_nvmem_config.size = size;
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mchp_nvmem_config.priv = otpc;
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nvmem = devm_nvmem_register(&pdev->dev, &mchp_nvmem_config);
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return PTR_ERR_OR_ZERO(nvmem);
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}
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static const struct of_device_id __maybe_unused mchp_otpc_ids[] = {
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{ .compatible = "microchip,sama7g5-otpc", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, mchp_otpc_ids);
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static struct platform_driver mchp_otpc_driver = {
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.probe = mchp_otpc_probe,
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.driver = {
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.name = MCHP_OTPC_NAME,
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.of_match_table = of_match_ptr(mchp_otpc_ids),
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},
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};
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module_platform_driver(mchp_otpc_driver);
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MODULE_AUTHOR("Claudiu Beznea <claudiu.beznea@microchip.com>");
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MODULE_DESCRIPTION("Microchip SAMA7G5 OTPC driver");
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MODULE_LICENSE("GPL");
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